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MT48H16M32LFCJ-8L Datasheet(PDF) 1 Page - Micron Technology |
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MT48H16M32LFCJ-8L Datasheet(HTML) 1 Page - Micron Technology |
1 / 73 page 512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM Features PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03 Micron Technology, Inc., reserves the right to change products or specifications without notice. MT48H32M16LF_1.fm - Rev. H 6/07 EN 1 ©2005 Micron Technology, Inc. All rights reserved. Mobile SDRAM MT48H32M16LF – 8 Meg x 16 x 4 banks MT48H16M32LF/LG – 4 Meg x 32 x 4 banks Features • Endur-IC™ technology • Fully synchronous; all signals registered on positive edge of system clock •VDD = 1.7–1.95V; VDDQ = 1.7–1.95V • Internal, pipelined operation; column address can be changed every clock cycle • Four internal banks for concurrent operation • Programmable burst lengths: 1, 2, 4, 8, and continuous1 • Auto precharge, includes concurrent auto precharge • Auto refresh and self refresh modes • LVTTL-compatible inputs and outputs • On-chip temperature sensor to control refresh rate • Partial-array self refresh (PASR) • Deep power-down (DPD) • Selectable output drive (DS) Table 1: Configuration Addressing DQ Bus Width Architecture JEDEC- Standard Option Reduced Page-Size Option2 Number of banks 4 4 Bank address balls BA0, BA1 BA0, BA1 x16 Row address balls A0–A12 – Column address balls A0–A9 – x32 Row address balls A0–A12 A0–A13 Column address balls A0–A8 A0–A7 Table 2: Key Timing Parameters CL = CAS (READ) latency Speed Grade Clock Rate (MHz) Access Time CL = 2 CL = 3 CL = 2 CL = 3 -75 104 133 9ns 6ns -8 100 125 9ns 7ns Notes: 1. For continuous page burst, contact factory for availability. 2. For reduced page-size option, contact fac- tory for availability. 3. LG is a reduced page-size option. Contact factory for availability. 4. Only available for x32 configuration. 5. Only available for x16 configuration. Options Marking •VDD/VDDQ – 1.8V/1.8V H •Row size option – Standard addressing option LF – Reduced page-size option LG3, 4 • Configuration – 32 Meg x 16 (8 Meg x 16 x 4 banks) 32M16 – 16 Meg x 32 (4 Meg x 32 x 4 banks) 16M32 • Plastic “green” packages – 54-Ball VFBGA (10mm x 11.5mm) CJ5 – 90-Ball VFBGA (10mm x 13mm) CM3 • Timing – cycle time – 7.5ns at CL = 3 -75 – 8ns at CL = 3 -8 •Power –Standard IDD2P/IDD7None –Low IDD2P/IDD7L • Operating temperature range – Commercial (0°C to +70°C) None – Industrial (–40°C to +85°C) IT •Design revision :A |
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