Programmable DC-Balanced

21-Bit Serializers

8

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VOS(-)

VOS(+)

VOS(-)

VOD(+)

VOD(-)

VOD(-)

TxOUT_- OR TxCLK OUT-

TxOUT_+ OR TxCLK OUT+

ΔVOS = |VOS(+) - VOS(-)|

(TxOUT_+) - (TxOUT_-) OR

(TxCLK OUT+) - (TxCLK OUT-)

ΔVOD = |VOD(+) - VOD(-)|

0V

TCIP

TxCLK IN

ODD TxIN

EVEN TxIN

TxOUT_+ OR

TxCLK OUT+

TxOUT_- OR

TxCLK OUT-

80%

80%

20%

20%

LLHT

LHLT

(TxOUT_+) - (TxOUT_-) OR

(TxCLK OUT+) - (TxCLK OUT-)

Figure 2. Worst-Case Test Pattern

Figure 3. LVDS Output Load and Transition Times

Figure 1. LVDS Output DC Parameters

90%

10%

90%

10%

TxCLK IN

TCIT

TCIT

Figure 4. Clock Transition Time Waveform