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MAX7359ETG+ Datasheet(PDF) 3 Page - Maxim Integrated Products

Part # MAX7359ETG+
Description  2-Wire Interfaced Low-EMI Key Switch Controller/GPO
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX7359ETG+ Datasheet(HTML) 3 Page - Maxim Integrated Products

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2-Wire Interfaced Low-EMI
Key Switch Controller/GPO
_______________________________________________________________________________________
3
I2C TIMING CHARACTERISTICS
(VCC = 1.62V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 2.5V, TA = +25°C.) (Notes 1, 2) (Figure 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Capacitance
(SCL, SDA, AD0)
CIN
(Notes 3, 4)
10
pF
SCL Serial-Clock Frequency
fSCL
Bus timeout disabled
0
400
kHz
Bus Free Time Between a STOP
and a START Condition
tBUF
1.3
µs
Hold Time (Repeated) START
Condition
tHD, STA
0.6
µs
Repeated START Condition
Setup Time
tSU, STA
0.6
µs
STOP Condition Setup Time
tSU, STO
0.6
µs
Data Hold Time
tHD, DAT
(Note 5)
0.9
µs
Data Setup Time
tSU, DAT
100
ns
SCL Clock Low Period
tLOW
1.3
µs
SCL Clock High Period
tHIGH
0.7
µs
Rise Time of Both SDA and SCL
Signals, Receiving
tR
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of Both SDA and SCL
Signals, Receiving
tF
(Notes 3, 4)
20 +
0.1Cb
300
ns
Fall Time of SDA Transmitting
tF.TX
(Notes 3, 6)
20 +
0.1Cb
250
ns
Pulse Width of Spike Suppressed
tSP
(Notes 3, 7)
50
ns
Capacitive Load for Each Bus Line
Cb
(Note 3)
400
pF
Note 1: All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: All digital inputs at VCC or GND.
Note 3: Guaranteed by design.
Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.8V and 2.1V.
Note 5: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 6: ISINK ≤ 6mA. Cb = total capacitance of one bus line in pF. tR and tF measured between 0.8V and 2.1V.
Note 7: Input filters on the SDA, SCL, and AD0 inputs suppress noise spikes less than 50ns.


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