16-Bit, 500Msps, Interpolating and Modulating

Dual DAC with Interleaved LVDS Inputs

6

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PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Supply Voltage

3.135

3.3

3.465

V

3.135

3.3

3.465

Analog Supply Voltage

1.71

1.8

1.89

V

111

130

Analog Supply Current

27

32

mA

Digital Supply Current

229

250

mA

Digital I/O Supply Current

912

mA

Clock Supply Current

2.3

4

mA

Total Power Dissipation

831

mW

530

1

26

350

Power-Down Current

All I/O are static high or

low, bit 2 to bit 4 of

address 00h are set high

2

µA

Ratio

(Note 10)

0.125

%FS/V

ELECTRICAL CHARACTERISTICS (continued)

50

unless otherwise noted.) (Note 2)

≥ +25°C.

Note 4: 3.84MHz bandwidth, single carrier.

Note 5: Excludes data latency.

Note 6: Measured single-ended into a 50

Ω load.

Note 7: Excludes sin(x)/x rolloff.

Note 9: Guaranteed by design and characterization.

Note 10:Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.

V(CLKN)

V(CLKP)