6

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Precision, Dual, High-Speed Analog Switches

50%

tOFF

tr < 20ns

tf < 20ns

VO

VO

tON

0.9VO

0.9VO

+3V

0V

0V

LOGIC

INPUT

SWITCH

INPUT

SWITCH

OUTPUT

SWITCH

INPUT

LOGIC INPUT WAVEFORM IS INVERTED FOR

SWITCHES THAT HAVE THE OPPOSITE LOGIC

SENSE CONTROL

+5V

+15V

V+

VO

RL = 1000Ω

CL = 35pF

V-

-15V

REPEAT TEST FOR EACH SWITCH

0V

GND

LOGIC

INPUT

SWITCH

INPUT

IN1

for tON

for tOFF

FOR LOAD CONDITIONS, SEE

Electrical Characteristics.

CL INCLUDES FIXTURE AND STRAY CAPACITANCE

RL

V+

VL

COM

NC

OR NO

V-

50%

VO1

VO2

0.9VO

+3V

0V

VCOM

0V

VCOM

LOGIC

INPUT

SWITCH

OUTPUT

SWITCH

OUTPUT

+5V

VL

+15V

V+

NO

V-

-15V

CL INCLUDES FIXTURE AND STRAY CAPACITANCE.

LOGIC 0 INPUT.

0V

GND

LOGIC

INPUT

VCOM_ = +10V

VCOM_ = +10V

0V

0.9VO

tD

tD

IN_

RL2

NC_

CL2

VO2

RL1

VO1

CL1

RL = 1000Ω

CL = 35pF

COM_

COM_

VGEN

GND

NC OR NO

CL

10nF

VO

0V

-15V

V-

V+

RGEN

VO

INX

ON

OFF

ON

∆VO

Q = (

∆VO)(CL)

COM

+5V

+15V

Figure 2. Switching-Time Test Circuit

Figure 3. Break-Before-Make Test Circuit

Figure 4. Charge-Injection Test Circuit