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DS28EC20+ Datasheet(PDF) 10 Page - Dallas Semiconductor

Part # DS28EC20+
Description  20Kb 1-Wire EEPROM
Download  24 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS28EC20+ Datasheet(HTML) 10 Page - Dallas Semiconductor

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DS28EC20: 20Kb 1-Wire EEPROM
10 of 24
Figure 7-1. Memory Function Flow Chart
0Fh
Write Scratch-
pad ?
Bus Master TX EEPROM
Array Target Address
TA1 (T[7:0]), TA2 (T[15:8])
Y
N
To Figure 7,
2
nd Part
From Figure 7,
2
nd Part
Bus Master TX Memory
Function Command
To ROM Functions
Flow Chart (Figure 9)
From ROM Functions
Flow Chart (Figure 9)
Master
TX Reset ?
Master TX Data Byte
To Scratchpad Offset
N
Y
DS28EC20 sets Scratch-
pad Offset = (T[4:0]),
Clears PF, AA, BS
Scrpad. Offset
= 11111b?
DS28EC20 TX CRC16
of Command, Address,
Data Bytes as they were
sent by the bus master
DS28EC20
Increments
Scratchpad
Offset
Master
TX Reset?
Y
N
Bus Master
RX “1”s
N
Partial
Byte ?
PF = 1
Y
N
Y
If the memory is write-protected, the
DS28EC20 copies the data byte from
the target address into the scratchpad.
If the memory is in EPROM mode, the
DS28EC20 stores the bitwise logical
AND of the transmitted byte and the
data byte from the targeted address
into the scratchpad.
DS28EC20 sets (E[4:0]) =
Scratchpad Offset
Note: The PF Flag is set upon power-
on reset. It is cleared only if a com-
plete 16-bit target address is trans-
mitted. Sending less than 16 bits for
the target address sets the PF flag.


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