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DS28DG02 Datasheet(PDF) 9 Page - Dallas Semiconductor |
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DS28DG02 Datasheet(HTML) 9 Page - Dallas Semiconductor |
9 / 33 page DS28DG02: 2kb SPI EEPROM with PIO, RTC, Reset, Battery Monitor, and Watchdog 9 of 33 Power-On Default for PIO Read Inversion (PIO8 to PIO11), PIO Output Type and Output Mode ADDR b7 b6 b5 b4 b3 b2 b1 b0 10Fh POTM POT3 POT2 POT1 PIM11 PIM10 PIM9 PIM8 There is general read and write access to this address. Factory default: 80h. The contents of this register are automatically transferred to address 125h when the device powers up. BIT DESCRIPTION BIT(S) DEFINITION PIMn: PIO Power-On Default Read-Inversion b0 to b3 Power-on default state of the read-inversion bit of PIO8 to PIO11. PIM8 applies to PIO8, etc. Legend : 0 no inversion; 1 inversion POT1: Power-On Default Output Type b4 Power-on default output type of PIO0 to PIO3; Legend : 0 push-pull; 1 open drain POT2: Power-On Default Output Type b5 Power-on default output type of PIO4 to PIO7; Legend : 0 push-pull; 1 open drain POT3: Power-On Default Output Type b6 Power-on default output type of PIO8 to PIO11; Legend : 0 push-pull; 1 open drain POTM: Power-On Default Output Mode b7 Power-on default output mode of PIO0 to PIO11; Legend : 0 low-current, simultaneous switching; 1 high-current, sequential switching Unique Registration Number (118h to 11Fh) Each DS28DG02 has a unique registration number that is 64 bits long, as shown in Figure 3. The registration number begins with the family code at address 118h followed by the 48-bit serial number (LS-byte at the lower address) and ends at address 11Fh with the Cyclic Redundancy Check (CRC) of the first 56 bits. This CRC is generated using the a polynomial X 8 + X5 + X4 + 1. Additional information about CRCs is available in Application Note 27 . Figure 3. 64-Bit Registration Number MSB LSB 8-Bit CRC Code 48-Bit Serial Number 8-Bit Family Code (70h) MSB LSB MSB LSB MSB LSB PIO Output State ADDR b7 b6 b5 b4 b3 b2 b1 b0 120h OV7 OV6 OV5 OV4 OV3 OV2 OV1 OV0 121h X X X X OV11 OV10 OV9 OV8 There is general read and write access to these addresses. These registers are automatically loaded with data from address 10Ah/10Bh when the device powers up. BIT DESCRIPTION BIT(S) DEFINITION OVn: PIO Output State — Output state of PIO0 to PIO11. OV0 applies to PIO0, etc. Legend : 0 LOW; 1 HIGH if PIO direction is output X: (Not Assigned) — Reserved for future use. |
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