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DS1371 Datasheet(PDF) 8 Page - Dallas Semiconductor |
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DS1371 Datasheet(HTML) 8 Page - Dallas Semiconductor |
8 / 15 page DS1371 8 of 15 Address Map Table 2 shows the address map for the registers of the DS1371. During a multibyte access, when the address pointer reaches the end of the register space (08h), it wraps around to location 00h. On an I2C START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run. This eliminates the need to reread the registers in case of an update of the main registers during a read. Table 2. Address Map ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 FUNCTION 00H TOD COUNTER BYTE 0 Time-of-Day Counter 01H TOD COUNTER BYTE 1 Time-of-Day Counter 02H TOD COUNTER BYTE 2 Time-of-Day Counter 03H TOD COUNTER BYTE 3 Time-of-Day Counter 04H WD/ ALM COUNTER BYTE 0 Watchdog/ Alarm Counter 05H WD/ ALM COUNTER BYTE 1 Watchdog/ Alarm Counter 06H WD/ ALM COUNTER BYTE 2 Watchdog/ Alarm Counter 07H EOSC WACE WD/ALM 0 INTCN RS2 RS1 AIE Control 08H OSF 0 0 0 0 0 0 AF Status Note: Unless otherwise specified, the state of the registers are not defined when power is first applied. |
Similar Part No. - DS1371_07 |
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Similar Description - DS1371_07 |
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