U631H64

7

March 31, 2006

STK Control #ML0045

Rev 1.0

No.

STORE Cycle Inhibit and

Automatic Power Up RECALL

Symbol

Min.

Max.

Unit

Alt.

IEC

650

μs

Low Voltage Trigger Level

4.0

4.5

V

Nonvolatile Memory Operations

STORE Cycle Inhibit and Automatic Up RECALL

k:

5.0 V

STORE inhibit

Power Up

RECALL

(24)

t

Software Mode Selection

E

W

A12 - A0

(hex)

Mode

I/O

Power

Notes

L

H

0000

1555

0AAA

1FFF

10F0

0F0F

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile STORE

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

Active

l, m

l, m

l, m

l, m

l, m

l

L

H

0000

1555

0AAA

1FFF

10F0

0F0E

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Read SRAM

Nonvolatile RECALL

Output Data

Output Data

Output Data

Output Data

Output Data

Output High Z

Active

l, m

l, m

l, m

l, m

l, m

l

l:

The six consecutive addresses must be in order listed (0000, 1555, 0AAA, 1FFF, 10F0, 0F0F) for a Store cycle or (0000, 1555, 0AAA,

1FFF, 10F0, 0F0E) for a RECALL cycle. W must be high during all six consecutive cycles. See STORE cycle and RECALL cycle tables and

diagrams for further details.

The following six-address sequence is used for testing purposes and should not be used: 0000, 1555, 0AAA, 1FFF, 10F0, 139C.

m: I/O state assumes that G

≤ V