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PIC18FXX2 Datasheet(PDF) 51 Page - Microchip Technology |
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PIC18FXX2 Datasheet(HTML) 51 Page - Microchip Technology |
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51 / 332 page  © 2006 Microchip Technology Inc. DS39564C-page 49 PIC18FXX2 4.10 Access Bank The Access Bank is an architectural enhancement which is very useful for C compiler code optimization. The techniques used by the C compiler may also be useful for programs written in assembly. This data memory region can be used for: • Intermediate computational values • Local variables of subroutines • Faster context saving/switching of variables • Common variables • Faster evaluation/control of SFRs (no banking) The Access Bank is comprised of the upper 128 bytes in Bank 15 (SFRs) and the lower 128 bytes in Bank 0. These two sections will be referred to as Access RAM High and Access RAM Low, respectively. Figure 4-6 and Figure 4-7 indicate the Access RAM areas. A bit in the instruction word specifies if the operation is to occur in the bank specified by the BSR register or in the Access Bank. This bit is denoted by the ’a’ bit (for access bit). When forced in the Access Bank (a = 0), the last address in Access RAM Low is followed by the first address in Access RAM High. Access RAM High maps the Special Function registers, so that these registers can be accessed without any software overhead. This is useful for testing status flags and modifying control bits. 4.11 Bank Select Register (BSR) The need for a large general purpose memory space dictates a RAM banking scheme. The data memory is partitioned into sixteen banks. When using direct addressing, the BSR should be configured for the desired bank. BSR<3:0> holds the upper 4 bits of the 12-bit RAM address. The BSR<7:4> bits will always read ’0’s, and writes will have no effect. A MOVLB instruction has been provided in the instruction set to assist in selecting banks. If the currently selected bank is not implemented, any read will return all '0's and all writes are ignored. The STATUS register bits will be set/cleared as appropriate for the instruction performed. Each Bank extends up to FFh (256 bytes). All data memory is implemented as static RAM. A MOVFF instruction ignores the BSR, since the 12-bit addresses are embedded into the instruction word. Section 4.12 provides a description of indirect address- ing, which allows linear addressing of the entire RAM space. FIGURE 4-8: DIRECT ADDRESSING Note 1: For register file map detail, see Table 4-1. 2: The access bit of the instruction can be used to force an override of the selected bank (BSR<3:0>) to the registers of the Access Bank. 3: The MOVFF instruction embeds the entire 12-bit address in the instruction. Data Memory(1) Direct Addressing Bank Select(2) Location Select(3) BSR<3:0> 7 0 From Opcode(3) 00h 01h 0Eh 0Fh Bank 0 Bank 1 Bank 14 Bank 15 1FFh 100h 0FFh 000h EFFh E00h FFFh F00h |
Similar Part No. - PIC18FXX2_06 |
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Similar Description - PIC18FXX2_06 |
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