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MCP6G01 Datasheet(PDF) 4 Page - Microchip Technology |
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MCP6G01 Datasheet(HTML) 4 Page - Microchip Technology |
4 / 38 page MCP6G01/1R/1U/2/3/4 DS22004B-page 4 © 2006 Microchip Technology Inc. DIGITAL ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = 25°C, VDD = +1.8V to +5.5V, VSS = GND, G = +1 V/V, VIN = (0.3V)/G, RL = 100 kΩ to VDD/2, CL = 60 pF, GSEL = VDD/2, and CS is tied low. Parameters Sym Min Typ Max Units Conditions CS Low Specifications CS Logic Threshold, Low VCSL 0 — 0.2VDD VCS = 0V CS Input Current, Low ICSL —30— pA CS = 0V CS High Specifications CS Logic Threshold, High VCSH 0.8VDD —VDD VCS = VDD CS Input Current, High ICSH —0.8 — µA CS = VDD = 5.5V Quiescent Current per Amplifier, Shutdown Mode (IDD) IDD_SHDN — 120 — pA CS = VDD, MCP6G03 Quiescent Current per Amplifier, Shutdown Mode (ISS) (Note 3) ISS_SHDN — –2.4 — µA CS = VDD = 1.8V, MCP6G03 ISS_SHDN — –7.2 — µA CS = VDD = 5.5V, MCP6G03 CS Dynamic Specifications Input Capacitance CCS —10— pF Input Rise/Fall Times tCSRF —— 2 µs (Note 2) CS Low to Amplifier Output High Turn-on Time tCSON — 40 — µs G = +1 V/V, VDD = 1.8V, VIN = 0.9VDD CS = 0.2VDD to VOUT = 0.8VDD tCSON — 7 — µs G = +1 V/V, VDD = 5.5V, VIN = 0.9VDD CS = 0.2VDD to VOUT = 0.8VDD CS High to Amplifier Output High-Z Turn-off Time tCSOFF — 30 —µs G = +1 V/V, VIN = VDD/2, CS = 0.8VDD to VOUT = 0.1VDD/2 Hysteresis VCSHY —0.40 — V VDD = 1.8V VCSHY —0.55 — V VDD = 5.5V GSEL Specifications (Note 1) GSEL Logic Threshold, Low VGSL 0.15VDD — 0.35VDD V Gain changes between 1 and 10, IGSEL = 0 GSEL Logic Threshold, High VGSH 0.65VDD — 0.85VDD V Gain changes between 1 and 50, IGSEL = 0 GSEL Input Current, Low IGSL –10 — –1.5 µA GSEL voltage = 0.3VDD GSEL Input Current, High IGSH +1.5 — +10 µA GSEL voltage = 0.7VDD GSEL Dynamic Specifications (Note 1) Input Capacitance CGSEL —8— pF Input Rise/Fall Times tGSRF —— 10 µs (Note 2) Hysteresis VGSHY —45— mV VDD = 1.8V VGSHY —95— mV VDD = 5.5V GSEL Low to Valid Output Time, G = +1 to +10 Select tGSL1 — 10 —µs VIN = 150 mV, GSEL = 0.25VDD to VOUT = 1.37V GSEL Middle to Valid Output Time, G = +10 to +1 Select tGSM10 — 12 —µs VIN = 150 mV, GSEL = 0.25VDD to VOUT = 0.28V GSEL High to Valid Output Time, G = +1 to +50 Select tGSH1 — 9 —µs VIN = 30 mV, GSEL = 0.75VDD to VOUT = 1.35V GSEL Middle to Valid Output Time, G = +50 to +1 Select tGSM50 — 8 —µs VIN = 30 mV, GSEL = 0.75VDD to VOUT = 0.18V Note 1: GSEL is a tri-level input pin. The gain is 10 when its voltage is low, 1 when it is at mid-suppy, and 50 when it is high. 2: Not tested in production. Set by design and characterization. 3: ISS_SHDN includes the current through the CS pin, RL and RLAD, and excludes digital switching currents. The block dia- gram on the from page shows these current paths (through VSS). |
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