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AME8850AEEVADJY Datasheet(PDF) 8 Page - Analog Microelectronics |
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AME8850AEEVADJY Datasheet(HTML) 8 Page - Analog Microelectronics |
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8 / 19 page  AME, Inc. 8 600mA CMOS LDO AME8850 伍 豐 明 年 每 股 EPS挑 戰 11 元 伍 豐 Rev.B.01 The AME8850 family of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection, and thermal shutdown. The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal pro- tection circuits. During normal operation, the error ampli- fier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits become ac- tive when the junction temperature exceeds 150oC, or the current exceeds 600mA. During thermal shutdown, the output voltage remains low. Normal operation is re- stored when the junction temperature drops below 120oC. The AME8850 switches from voltage mode to current mode when the load exceeds the rated output current. This prevents over-stress. The AME8850 also incorpo- rates current fold-back to reduce power dissipation when the output is short circuited. This feature becomes active when the output drops below 0.8 volts, and reduces the current flow by 65%. Full current is restored when the voltage exceeds 0.8 volts. n Detailed Description n External Capacitors The AME8850 is stable with an output capacitor to ground of 2.2 µF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Con- versely, Aluminum Electrolytic capacitors exhibit the high- est ESR, resulting in the poorest AC response. Unfortu- nately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1 µF ceramic ca- pacitor with a 10 µF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the in- put and ground to stabilize Vin. The input capacitor should be at least 0.1 µF to have a beneficial effect. All capacitors should be placed in close proximity to the pins. A "Quiet" ground termination is desirable. This can be achieved with a "Star" connection. n Enable The Enable pin normally floats high. When actively, pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the qui- escent current is less than 1 µA. This pin behaves much like an electronic switch. n ADJ The ADJ pin is the positive input to the error amplifier which, due to the PMOS pass element inversion, means it is actually the negative input of the LDO feedback loop. The feedback works to keep the voltage at the ADJ pin 1.2V with respect to ground. Since the internal circuitry at the ADJ pin is essentially an ESD protected CMOS gate the input current at the ADJ pin is virtually zero. |
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