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M95128-WDW3V Datasheet(PDF) 11 Page - STMicroelectronics

Part # M95128-WDW3V
Description  128 Kbit Serial SPI bus EEPROM with high speed clock
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95128-WDW3V Datasheet(HTML) 11 Page - STMicroelectronics

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M95128, M95128-W, M95128-R
Operating features
11/41
3.7.4
Power-down
At Power-down, the device must be deselected and in Standby Power mode (that is, there
should be no internal Write cycle in progress). Chip Select (S) should be allowed to follow
the voltage applied on VCC.
4
Operating features
4.1
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven Low at the same time as
Serial Clock (C) already being Low (as shown in Figure 4).
The Hold condition ends when the Hold (HOLD) signal is driven High at the same time as
Serial Clock (C) already being Low.
Figure 4 also shows what happens if the rising and falling edges are not timed to coincide
with Serial Clock (C) being Low.
Figure 4.
Hold condition activation
AI02029D
HOLD
C
Hold
Condition
Hold
Condition


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