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ISP1506A Datasheet(PDF) 8 Page - NXP Semiconductors

Part # ISP1506A
Description  ULPI Hi-Speed Universal Serial Bus On-The-Go transceiver
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

ISP1506A Datasheet(HTML) 8 Page - NXP Semiconductors

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ISP1506A_ISP1506B_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 30 May 2007
8 of 79
NXP Semiconductors
ISP1506A; ISP1506B
ULPI HS USB OTG transceiver
Squelch circuit to detect high-speed bus activity
High-speed disconnect detector
45
Ω high-speed bus terminations on DP and DM for peripheral and host modes
1.5 k
Ω pull-up resistor on DP for full-speed peripheral mode
15 k
Ω bus terminations on DP and DM for host and OTG modes
For details on controlling resistor settings, see Table 7.
7.4 Voltage regulator
The ISP1506 contains a built-in voltage regulator that conditions the VCC supply for use
inside the ISP1506. The voltage regulator:
Supports input supply range 3.0V<VCC < 3.6 V
Supplies internal circuitry with 1.8 V and 3.3 V
Remark: The REG1V8 and REG3V3 pins require external decoupling capacitors. For
details, see Section 16.
7.5 Crystal oscillator and PLL
The ISP1506 has a built-in crystal oscillator and a Phase-Locked Loop (PLL) for clock
generation.
The crystal oscillator takes a sine-wave input from an external crystal, on the XTAL1 pin,
and converts it to a square wave clock for internal use. Alternatively, a square wave clock
of the same frequency can also be directly driven into the XTAL1 pin. Using an existing
square wave clock can save the cost of the crystal and also reduce the board size.
The PLL takes the square wave clock from the crystal oscillator and multiplies or divides it
into various frequencies for internal use. The PLL produces the following frequencies,
irrespective of the clock source:
60 MHz clock for the ULPI interface controller
1.5 MHz for the low-speed USB data
12 MHz for the full-speed USB data
480 MHz for the high-speed USB data
Other internal frequencies for data conversion and data recovery
7.6 OTG module
This module contains several sub-blocks that provide all the functionality required by the
USB OTG specification. Specifically, it provides the following circuits:
The ID detector to sense the ID pin of the mini-USB cable. The ID pin dictates which
device is initially configured as the host and which as the peripheral.
VBUS comparators to determine the VBUS voltage level. This is required for the VBUS
detection, SRP and HNP.
Resistors to temporarily charge and discharge VBUS. This is required for SRP.


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