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25AA640 Datasheet(PDF) 11 Page - Microchip Technology

Part # 25AA640
Description  64K SPI Bus Serial EEPROM
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

25AA640 Datasheet(HTML) 11 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS21223G-page 11
25AA640/25LC640
3.6
Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the Status reg-
ister. The array is divided up into four segments. The
user has the ability to write-protect none, one, two, or
all four of the segments of the array. The partitioning is
controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the Status register control the program-
mable hardware write-protect feature. Hardware write
protection is enabled when the WP pin is low and the
WPEN bit is high. Hardware write protection is disabled
when either the WP pin is high or the WPEN bit is low.
When the chip is hardware write-protected, only writes
to nonvolatile bits in the Status register are disabled.
See Table 3-3 for a matrix of functionality on the WPEN
bit.
See Figure 3-7 for WRSR timing sequence.
TABLE 3-2:
ARRAY PROTECTION
FIGURE 3-7:
WRITE STATUS REGISTER TIMING SEQUENCE
BP1
BP0
Array Addresses
Write-Protected
00
none
01
upper 1/4
(1800h-1FFFh)
10
upper 1/2
(1000h-1FFFh)
11
all
(0000h-1FFFh)
SO
SI
CS
9
1011
12
131415
01
0
0
0
0
00
76
5
4
21
0
Instruction
Data to Status Register
High-impedance
SCK
0
23456
7
1
8
3


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