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TDA5149G Datasheet(PDF) 13 Page - NXP Semiconductors |
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TDA5149G Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 28 page  1996 May 06 13 Philips Semiconductors Product specification 12 V Voice Coil Motor (VCM) driver and spindle motor pre-driver combination chip TDA5149G Table 9 REG # 4: address 101; | WATCHDOG_REG[4 to 0] | Table 10 REG # 6: address 110; | not used | not used | COMDELIM_REG[2 to 0] | Table 11 Commutation delay limit Note 1. Even COMDELIM _REG values must be avoided. Table 12 REG # 7: address 111; | BLANK_REG[4 to 0] | DATA BIT RESET STATE DESCRIPTION WATCHDOG_4 0 The watchdog timer checks for correct back EMF polarity, which indicates correct rotation of the motor WATCHDOG_3 0 WATCHDOG_2 0 WATCHDOG_1 0 WATCHDOG_0 0 DATA BIT RESET STATE DESCRIPTION COMDELIM_2 0 Defines the maximum commutation delay limit by setting the saturation value of the zero crossing counter. tIC represents the period of the internal clock. Table 11 shows the delays which can be obtained. COMDELIM_1 0 COMDELIM_0 0 COMDELIM_REG COUNTER SATURATION VALUE MAXIMUM COMMUTATION DELAY 111 2047 tIC × 1023 110; note 1 1535 tIC × 767 101 1023 tIC × 511 100; note 1 767 tIC × 383 011 511 tIC × 255 010; note 1 383 tIC × 191 001 255 tIC × 127 000; note 1 191 tIC × 95 DATA BIT RESET STATE DESCRIPTION BLANK_4 0 In the hard switching mode, the blank delay inhibits the back EMF comparator outputs just at the moment the MOT outputs are commutating, until they have been stabilized again. To avoid false zero-crossing detection, the blank delay operates in the same way at the end of the fly-back pulse (hard-switching mode), or at the end of the soft-switching interval (soft-switching mode). BLANK_3 0 BLANK_2 0 BLANK_1 0 BLANK_0 0 WATCHDOG delay 0 to 31 { } 64 × ( ) 1 + [ ] t IC × = BLANK delay 0 to 31 { } 4 × ( ) 1 + [ ] t IC × = |
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