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LTC2914IGN-1 Datasheet(PDF) 11 Page - Linear Technology |
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LTC2914IGN-1 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 16 page  LTC2914 11 2914f UV/OV Timing The LTC2914 has an adjustable timeout period (tUOTO) that holds OV or UV asserted after all faults have cleared. This assures a minimum reset pulse width allowing a settling time delay for the monitored voltage after it has entered the valid region of operation. When any VH input drops below its designed threshold, the UV pin asserts low. When all inputs recover above their designed thresholds, the UV output timer starts. If all inputs remain above their designed thresholds when the timer finishes, the UV pin weakly pulls high. However, if any input falls below its designed threshold during this time-out period, the timer resets and restarts when all inputs are above the designed thresholds. The OV output behaves as the UV output when LATCH is high (LTC2914-1). Selecting the UV/OV Timing Capacitor The UV and OV timeout period (tUOTO) for the LTC2914 is adjustable to accommodate a variety of applications. Connecting a capacitor, CTMR, between the TMR pin and ground sets the timeout period. The value of capacitor needed for a particular timeout period is: CTMR = tUOTO • 115 • 10 –9 (F/s) The Reset Timeout Period vs Capacitance graph found in the Typical Performance Characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. The TMR pin must have a minimum of 10pF or be tied to VCC. For long timeout periods, the only limitation is the availability of a large value capacitor with low leakage. Capacitor leakage current must not exceed the minimum TMR charging current of 1.3µA. Tying the TMR pin to VCC bypasses the timeout period. Undervoltage Lockout When VCC falls below 2V, the LTC2914 asserts an undervoltage lockout (UVLO) condition. During UVLO, UV is asserted and pulled low while OV is cleared and blocked from asserting. When VCC rises above 2V, UV follows the same timing procedure as an undervoltage condition on any input. Shunt Regulator The LTC2914 has an internal shunt regulator. The VCC pin operates as a direct supply input for voltages up to 6V. Under this condition, the quiescent current of the device remains below a maximum of 100µA. For VCC voltages higher than 6V, the device operates as a shunt regulator and must have a resistance RZ between the supply and the VCC pin to limit the current to no greater than 10mA. When choosing this resistance value, choose an appropriate location on the I-V curve shown in the Typical Performance Characteristics section to accommodate variations in VCC due to changes in current through RZ. UV and OV Output Characteristics The DC characteristics of the UV and OV pull-up and pull-down strength are shown in the Typical Performance Characteristics section. Each pin has a weak internal pull-up to VCC and a strong pull-down to ground. This arrangement allows these pins to have open-drain behavior while pos- sessing several other beneficial characteristics. The weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. On the other hand, the open-drain configuration allows for wired-OR connections and is useful when more than one signal needs to pull down on the output. VCC of 1V guarantees a maximum VOL = 0.15V at UV. APPLICATIO S I FOR ATIO |
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