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LTC2704IGW-12 Datasheet(PDF) 8 Page - Linear Technology |
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LTC2704IGW-12 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 20 page  8 LTC2704 2704f PI FU CTIO S V– (Pins 1, 8, 15, 22, 31, 36): Analog Negative Supply, Typically –15V. –4.5V to –16.5V Range. REFG1 (Pin 2): Reference 1 Ground. High impedance input, does not carry supply currents. Tie to clean analog ground. AGNDA (Pin 3): DAC A Signal Ground. High impedance input, does not carry supply currents. Tie to clean analog ground. VOSA (Pin 4): Offset Adjust for DAC A. Nominal input range is ±5V. VOS(DAC A) = –0.01• V(VOSA) [0V to 5V, ±2.5V modes]. See Operation section. C1A (Pin 5): Feedback Capacitor Connection for DAC A Output. This pin provides direct access to the negative input of the channel A output amplifier. OUTA (Pin 6): DAC A Voltage Output Pin. For best load regulation, this open-loop amplifier output is connected to RFBA as close to the load as possible. RFBA (Pin 7): DAC A Output Feedback Resistor Pin. LDAC (Pin 9): Asynchronous DAC Load Input. When LDAC is a logic low, all DACs are updated. CS/LD (Pin 10): Synchronous Chip Select and Load Pin. SDI (Pin 11): Serial Data Input. Data is clocked in on the rising edge of the serial clock when CS/LD is low. SRO (Pin 12): Serial Readback Data Output. Data is clocked out on the falling edge of SCK. Readback data begins clock- ing out after the last address bit A0 is clocked in. SCK (Pin 13): Serial Clock. CLR (Pin 14): Asynchronous Clear Pin. When this pin is low, all code and span B2 registers are cleared to zero. All DAC outputs are cleared to zero volts. RFBD (Pin 16): DAC D Voltage Output Feedback Resistor Pin. OUTD (Pin 17): DAC D Voltage Output Pin. For best load regulation, this open-loop amplifier output is connected to RFBD as close to the load as possible. TYPICAL PERFOR A CE CHARACTERISTICS LTC2704-16/LTC2704-14/LTC2704-12 0.1Hz to 10Hz Noise VCC Supply Current vs Logic Voltage 1s/DIV 1 µV/DIV 2704 G16 V+/V– = ±15V VREF = 5V 0V TO 5V RANGE CODE = 0 LOGIC VOLTAGE (V) 0 0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.5 2.5 3.5 2704 G17 2.0 4.5 5.0 1.0 1.5 3.0 4.0 VDD = 5V SCK, SDI, CS/LD, LDAC CLR TIED TOGETHER |
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