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PL663-18 Datasheet(PDF) 6 Page - PhaseLink Corporation |
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PL663-18 Datasheet(HTML) 6 Page - PhaseLink Corporation |
6 / 15 page Analog Frequency Multiplier PL660 and PL663 XO Families 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991 www.phaselink.com Rev. 3/20/07 Page 6 • There are two default variables that normally will not need to be modified. These are Cpad, and C11 and are found in cells B22 and B27 of ‘AFM Tuning Assistant’, respectively. • LWB1 is the combined stray inductance in the layout. The DIE wire bond is ~ 0.6 nH and in the case of a leaded part an additional 1.0 nH is added. Your layout inductance must be added to these. There are 2 of these and they are assumed to be approximately symmetrical so you only need to enter this inductance once in cell B23. • Enter the stray parasitic capacitance into cell B26. An additional 0.5 pF must be added to this value if a leaded part is used. • Enter the appropriate value for Cinternal into B21 based on the device used (see column D). Use the ‘AFM Tuning Assistant’ software to calculate L2X (and C2X if used) for your resonance frequency. • For 4X AFMs, repeat the same procedure in the L4X worksheet. • See the examples below. DETERMINING STRAY L’s AND C’s IN A LAYOUT Figure 6: Diagram Representation of PL660-08 Board Layout Let’s take the PL660-08 (4x XO) for example, as shown in Figure 6. This takes a crystal input range of 30 to 80 MHz and multiplies this to an output of 120 to 320 MHz. To determine the stray L’s and C’s of the layout we will assemble two test units. One AFM will be tuned to the lower range of the device (120 MHz), and the other to the upper range of the device (320 MHz). |
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