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PL611S-08 Datasheet(PDF) 1 Page - PhaseLink Corporation |
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PL611S-08 Datasheet(HTML) 1 Page - PhaseLink Corporation |
1 / 8 page (Preliminary)PL611s-08 Low-Power Programmable Quick Turn Clock T M 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/12/06 Page 1 FEATURES • Advanced low-power, space saving programmable PLL design • Very low Jitter and Phase Noise (30-70ps Pk-Pk typical) • Up to 2 programmable clock outputs • Output frequency up to 75MHz. • Accepts Crystal or Ref Clock input o Fundamental Crystal: 10MHz-50MHz o Reference Input: 1MHz to 100MHz • Accepts >0.1V reference signal input voltage • Single 1.8V, 2.5V, or 3.3V ± 10% power supply • Operating temperature range from -40C to 85°C • Available in 6-pin TDFN, SC70, and SOT23, GREEN /RoHS compliant packages DESCRIPTION The PL611s-08 is a low-power general purpose frequency synthesizer and a member of PhaseLink’s Programmable ‘Quick Turn Clock (QTC)’ family. PhaseLink’s PL611s-08 can generate two system clock frequencies of up to 75MHz from a 10MHz to 50MHz fundamental crystal or a 1MHz to 100MHz Reference clock source. The PL611s-08 offers the best phase noise and jitter performance, and power consumption of its rivals. Cascading of the ICs to produce additional clock frequencies is also supported. PACKAGE PIN CONFIGURATION BLOCK DIAGRAM Phase Detector Charge Pump Loop Filter VCO XIN/FIN XOUT R-Counter (8-bit) FVCO = FREF * (2 * M/R) FOUT = FVCO / (2 * P) CLK0 FREF Programming Logic OE, CLK1 XTAL OSC M-Counter (11-bit) P-Counter (5-bit) Programmable CLoad Programmable Function 1 2 3 4 5 6 OE, CLK1 GND XIN, FIN VDD XOUT CLK0 DFN DFN DFN DFN----6 6 6 6L L L L ((((2 2 2 2....0 0 0 0mmx mmx mmx mmx1 1 1 1....3 3 3 3mmx mmx mmx mmx0 0 0 0....6 6 6 6mm mm mm mm)))) SOT SOT SOT SOT23 23 23 23----6 6 6 6L L L L ((((3 3 3 3....0 0 0 0mmx mmx mmx mmx3 3 3 3....0 0 0 0mmx mmx mmx mmx1 1 1 1....35 35 35 35mm mm mm mm)))) 1 2 3 4 5 6 GND OE, CLK1 XIN, FIN VDD SC SC SC SC70 70 70 70----6 6 6 6L L L L ((((2 2 2 2....3 3 3 3mmx mmx mmx mmx2 2 2 2....25 25 25 25mmx mmx mmx mmx1 1 1 1....0 0 0 0mm mm mm mm)))) CLK0 XOUT XIN, FIN OE, CLK1 GND XOUT VDD CLK0 1 2 3 6 5 4 |
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