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LTC1174HVIS8 Datasheet(PDF) 6 Page - Linear Technology |
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LTC1174HVIS8 Datasheet(HTML) 6 Page - Linear Technology |
6 / 20 page 6 LTC1174 LTC1174-3.3/LTC1174-5 1174fe (Pin 1 connection shown for LTC1174-3.3 and LTC1174-5, changes create LTC1174) FU CTIO AL DIAGRA – + VTH2 – + – + VLIM2 VLIM1 IPGM RSENSE 0.1 Ω RESET VTH1 LBOUT 2 1174 BD gmVFB 1.25V REFERENCE Q GND 4 5 SW 1 VOUT (VFB) 7 – + A1 × R1* 31.5k SET 6 VIN LBIN 3 SHUTDOWN 8 CT SLEEP – + A3 A4 A5 VFB * R1 = 51k FOR LTC1174-3.3 R1 = 93.5k FOR LTC1174-5 A2 SW(Pin5):Drain of the P-Channel MOSFETSwitch. Cathode of Schottky diode must be closely connected to this pin. VIN (Pin 6): Input Supply Voltage. It must be decoupled close to ground Pin 4. IPGM (Pin 7): Selects the Current Limit of the P-Channel Switch. With IPGM = VIN, the current trip point is 600mA and with IPGM = 0V, the current trip value is reduced to 340mA. SHUTDOWN (Pin 8): Pulling this pin to ground keeps the internal switch off and puts the LTC1174 in micropower shutdown. VOUT (VFB)(Pin1): FortheLTC1174,thispinconnectstothe main voltage comparator’s input. On the LTC1174-3.3 and LTC1174-5 this pin goes to an internal resistive divider which sets the output voltage. LBOUT (Pin 2): Open Drain of an N-Channel Pull-Down. This pin will sink current when Pin 3 (LBIN) goes below 1.25V. During shutdown the state of this pin is indeterminate. LBIN (Pin 3): The “–” Input of the Low-Battery Voltage Comparator. The “+” input is connected to a reference voltage of 1.25V. GND (Pin 4): Ground Pin. PI FU CTIO S |
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