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LT1167ACS8 Datasheet(PDF) 11 Page - Linear Technology |
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LT1167ACS8 Datasheet(HTML) 11 Page - Linear Technology |
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11 / 20 page  11 LT1167 Q1 RG 2 OUTPUT 6 REF 1167 F01 5 7 – + A1 A3 VB R1 24.7k R3 400 Ω R4 400 Ω C1 1 RG 8 R7 10k R8 10k R5 10k R6 10k DIFFERENCE AMPLIFIER STAGE PREAMP STAGE +IN –IN 3 – + A2 VB R2 24.7k C2 V + V – V – V + V – Q2 V – V + 4 V – with programmed gain. Therefore, the bandwidth does not drop proportionally to gain. The input transistors Q1 and Q2 offer excellent matching, which is inherent in NPN bipolar transistors, as well as picoampere input bias current due to superbeta process- ing. The collector currents in Q1 and Q2 are held constant due to the feedback through the Q1-A1-R1 loop and Q2-A2-R2 loop which in turn impresses the differential input voltage across the external gain set resistor RG. Since the current that flows through RG also flows through R1 and R2, theratios provide a gained-up differential volt- age,G = (R1 + R2)/RG, to the unity-gain differenceamplifier A3. The common mode voltage is removed by A3, result- ing in a single-ended output voltage referenced to the voltage on the REF pin. The resulting gain equation is: VOUT – VREF = G(VIN+ – VIN–) where: G = (49.4k Ω/RG) + 1 solving for the gain set resistor gives: RG = 49.4kΩ /(G – 1) The LT1167 is a modified version of the three op amp instrumentation amplifier. Laser trimming and mono- lithic construction allow tight matching and tracking of circuit parameters over the specified temperature range. Refer to the block diagram (Figure 1) to understand the following circuit description. The collector currents in Q1 and Q2 are trimmed to minimize offset voltage drift, thus assuring a high level of performance. R1 and R2 are trimmed to an absolute value of 24.7k to assure that the gain can be set accurately (0.05% at G = 100) with only one external resistor RG. The value of RG determines the transconductance of the preamp stage. As RG is reduced for larger programmed gains, the transconductance of the input preamp stage increases to that of the input transistors Q1 and Q2. This increases the open-loop gain when the programmed gain is increased, reducing the input referred gain related errors and noise. The input voltage noise at gains greater than 50 is determined only by Q1 and Q2. At lower gains the noise of the difference amplifier and preamp gain setting resistors increase the noise. The gain bandwidth product is determined by C1, C2 and the preamp transconductance which increases Figure 1. Block Diagram BLOCK DIAGRA THEORY OF OPERATIO |
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