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SST32HF32A2 Datasheet(PDF) 1 Page - Silicon Storage Technology, Inc |
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SST32HF32A2 Datasheet(HTML) 1 Page - Silicon Storage Technology, Inc |
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1 / 35 page  ©2005 Silicon Storage Technology, Inc. S71261-01-000 5/05 1 The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF+ and ComboMemory are trademarks of Silicon Storage Technology, Inc. These specifications are subject to change without notice. Preliminary Specifications FEATURES: • ComboMemories organized as: – 2M x16 Flash + 1024K x16 PSRAM • Single 2.7-3.3V Read and Write Operations • Concurrent Operation – Read from or Write to PSRAM while Erase/Program Flash • Superior Reliability – Endurance: 100,000 Cycles (typical) – Greater than 100 years Data Retention • Low Power Consumption: – Active Current: 15 mA (typical) for Flash or PSRAM Read – Standby Current: 60 µA (typical) • Flexible Erase Capability – Uniform 2 KWord sectors – Uniform 32 KWord size blocks • Erase-Suspend/Erase-Resume Capabilities • Security-ID Feature – SST: 128 bits; User: 128 bits • Hardware Block-Protection/WP# Input Pin – Top Block-Protection (top 32 KWord) for SST32HF32A2 • Fast Read Access Times: – Flash: 70 ns – PSRAM: 70 ns • Latched Address and Data for Flash • Flash Fast Erase and Word-Program: – Sector-Erase Time: 18 ms (typical) – Block-Erase Time: 18 ms (typical) – Chip-Erase Time: 40 ms (typical) – Word-Program Time: 7 µs (typical) • Flash Automatic Erase and Program Timing – Internal VPP Generation • Flash End-of-Write Detection – Toggle Bit – Data# Polling • CMOS I/O Compatibility • JEDEC Standard Command Set • Package Available – 63-ball LFBGA (8mm x 10mm x 1.4mm) – 62-ball LFBGA (8mm x 10mm x 1.4mm) • All non-Pb (lead-free) devices are RoHS compliant PRODUCT DESCRIPTION The SST32HF32A2 ComboMemory devices integrate a CMOS flash memory bank with a CMOS PseudoSRAM (PSRAM) memory bank in a Multi-Chip Package (MCP), manufactured with SST’s proprietary, high-performance SuperFlash technology. Featuring high-performance Word-Program, the flash memory bank provides a maximum Word-Program time of 7 µsec. To protect against inadvertent flash write, the SST32HF32A2 devices contain on-chip hardware and soft- ware data protection schemes. The SST32HF32A2 devices offer a guaranteed endurance of 10,000 cycles. Data retention is rated at greater than 100 years. The SST32HF32A2 devices consist of two independent memory banks with respective bank enable signals. The flash and PSRAM memory banks are superimposed in the same memory address space. Both memory banks share common address lines, data lines, WE# and OE#. The memory bank selection is done by memory bank enable signals. The PSRAM bank enable signal, BES# selects the PSRAM bank. The flash memory bank enable signal, BEF# selects the flash memory bank. The WE# signal has to be used with Software Data Protection (SDP) command sequence when controlling the Erase and Program opera- tions in the flash memory bank. The SDP command sequence protects the data stored in the flash memory bank from accidental alteration. The SST32HF32A2 provide the added functionality of being able to simultaneously read from or write to the PSRAM bank while erasing or programming in the flash memory bank. The PSRAM memory bank can be read or written while the flash memory bank performs Sector- Erase, Bank-Erase, or Word-Program concurrently. All flash memory Erase and Program operations will automati- cally latch the input address and data signals and complete the operation in background without further input stimulus requirement. Once the internally controlled Erase or Pro- gram cycle in the flash bank has commenced, the PSRAM bank can be accessed for Read or Write. Multi-Purpose Flash Plus + PSRAM ComboMemory SST32HF32A2 SST32HF32A32Mb Flash + 16Mb SRAM (x16) MCP ComboMemories |
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