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SST27SF010-70-3C-NH Datasheet(PDF) 9 Page - Silicon Storage Technology, Inc |
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SST27SF010-70-3C-NH Datasheet(HTML) 9 Page - Silicon Storage Technology, Inc |
9 / 23 page Data Sheet 512 Kbit / 1 Mbit / 2 Mbit Many-Time Programmable Flash SST27SF512 / SST27SF010 / SST27SF020 9 ©2005 Silicon Storage Technology, Inc. S71152-11-000 9/05 AC CHARACTERISTICS TABLE 11: READ CYCLE TIMING PARAMETERS VDD = 4.5-5.5V (TA = 0°C to +70°C (Commercial)) Symbol Parameter Min Max Units TRC Read Cycle Time 70 ns TCE Chip Enable Access Time 70 ns TAA Address Access Time 70 ns TOE Output Enable Access Time 35 ns TCLZ1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. CE# Low to Active Output 0 ns TOLZ1 OE# Low to Active Output 0 ns TCHZ1 CE# High to High-Z Output 25 ns TOHZ1 OE# High to High-Z Output 25 ns TOH1 Output Hold from Address Change 0 ns T11.3 1152 TABLE 12: PROGRAM/ERASE CYCLE TIMING PARAMETERS FOR SST27SF512 Symbol Parameter Min Max Units TAS Address Setup Time 1 µs TAH Address Hold Time 1 µs TPRT OE#/VPP Pulse Rise Time 50 ns TVPS OE#/VPP Setup Time 1 µs TVPH OE#/VPP Hold Time 1 µs TPW CE# Program Pulse Width 20 30 µs TEW CE# Erase Pulse Width 100 500 ms TDS Data Setup Time 1 µs TDH Data Hold Time 1 µs TVR OE#/VPP and A9 Recovery Time 1 µs TART A9 Rise Time to 12V during Erase 50 ns TA9S A9 Setup Time during Erase 1 µs TA9H A9 Hold Time during Erase 1 µs T12.0 1152 |
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