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SCC68692E1A44 Datasheet(PDF) 2 Page - NXP Semiconductors |
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SCC68692E1A44 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 30 page  Philips Semiconductors Product specification SCC68692 Dual asynchronous receiver/transmitter (DUART) 2 1998 Sep 04 853–0977 19971 DESCRIPTION The Philips Semiconductors SCC68692 Dual Universal Asynchronous Receiver/Transmitter (DUART) is compatible with SCN68681. It is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. It is compatible with other S68000 family devices and can also interface easily with other microprocessors. The DUART can be used in a polled or interrupt driven systems. The operating mode and data format of each channel can be programmed independently. Additionally, each receiver and transmitter can select its operating speed as one of eighteen fixed baud rates, a 16X clock derived from a programmable counter/timer, or an external 1X or 16X clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems. Each receiver is quadruple buffered to minimize the potential of receiver over-run or to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability is provided to disable a remote DUART transmitter when the receiver buffer is full. Also provided on the SCC68692 are a multipurpose 6-bit input port and a multipurpose 8-bit output port. These can be used as general purpose I/O ports or can be assigned specific functions (such as clock inputs or status/interrupt outputs) under program control. FEATURES • S68000 bus compatible • Dual full-duplex asynchronous receiver/transmitters • Quadruple buffered receiver data register • Programmable data format: – 5 to 8 data bits plus parity – Odd, even, no parity or force parity – 1, 1.5 or 2 stop bits programmable in 1/16-bit increments • 16-bit programmable Counter/Timer • Programmable baud rate for each receiver and transmitter selectable from: – 22 fixed rates: 50 to 115.2k baud – Non-standard rates to 115.2kb – Non-standard user-defined rate derived from programmable counter/timer – External 1X or 16X clock • Parity, framing, and overrun error detection • False start bit detection • Line break detection and generation • Programmable channel mode – Normal (full-duplex) – Automatic echo – Local loopback – Remote loopback – Multidrop mode (also called ‘wake-up’ or ‘9-bit’) • Multi-function 6-bit input port – Can serve as clock or control inputs – Change of state detection on four inputs – Inputs have typically >100k pull-up resistors • Multi-function 8-bit output port – Individual bit set/reset capability – Outputs can be programmed to be status/interrupt signals • Versatile interrupt system – Single interrupt output with eight maskable interrupting conditions – Interrupt vector output on interrupt acknowledge – Output port can be configured to provide a total of up to six separate wire-ORable interrupt outputs • Maximum data transfer rates: 1X – 1MB/sec, 16X – 125kB/sec • Automatic wake-up mode for multidrop applications • Start-end break interrupt/status • Detects break which originates in the middle of a character • On-chip crystal oscillator • Power down mode • Receiver timeout mode • Commercial and Industrial temperature range versions • TTL compatible • Single +5V power supply ORDERING INFORMATION COMMERCIAL INDUSTRIAL DESCRIPTION VCC = +5V +10%, TA = 0 to +70°C VCC = +5V +10%, TA = -40 to +85°C DWG # 40-Pin (600 mils wide) Ceramic Dual In-Line Package (Cerdip) SCC68692C1F40 SCC68692E1F40 0590B 40-Pin (600 mils wide) Plastic Dual In-Line Package (DIP) SCC68692C1N40 SCC68692E1N40 SOT129-1 44-Pin Plastic Leaded Chip Carrier (PLCC) SCC68692C1A44 SCC68692E1A44 SOT187-2 |
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