Electronic Components Datasheet Search |
|
MAX9172ESA Datasheet(PDF) 6 Page - Maxim Integrated Products |
|
MAX9172ESA Datasheet(HTML) 6 Page - Maxim Integrated Products |
6 / 12 page Detailed Description LVDS Inputs The MAX9171/MAX9172 feature LVDS inputs for inter- facing high-speed digital circuitry. The LVDS interface standard is a signaling method intended for point-to- point communication over controlled-impedance media, as defined by the ANSI TIA/EIA-644 standards. The technology uses low-voltage signals to achieve fast transition times and minimize power dissipation and noise immunity. The MAX9171/MAX9172 convert LVDS signals to LVCMOS/LVTTL signals at rates in excess of 500Mbps. These devices are capable of detecting dif- ferential signals as low as 100mV and as high as 1.2V within a 0 to VCC input voltage range. Table 1 is the input-output function table. Fail-Safe The MAX9171/MAX9172 fail-safe drives the receiver output high when the differential input is: • Open • Undriven and shorted • Undriven and terminated Without fail-safe, differential noise at the input may switch the receiver and appear as data to the receiving system. An open input occurs when a cable and termi- nation are disconnected. An undriven, terminated input occurs when a cable is disconnected with the termina- tion still connected across the receiver inputs or when the driver of a receiver is in high impedance. An undriv- en, shorted input can occur due to a shorted cable. Single/Dual LVDS Line Receivers with “In-Path” Fail-Safe 6 _______________________________________________________________________________________ MAX9171 Pin Description PIN SOT23 SO/TDFN NAME FUNCTION 18 VCC Positive Power-Supply Input. Bypass with a 0.1µF and a 0.001µF capacitor to GND with the smallest capacitor closest to the pin. 2 5 GND Ground 3 7 OUT Receiver Output 4, 5, 6 3, 4, 6 N.C. No Connection. Not internally connected. 7 2 IN+ Noninverting Differential Receiver Input 8 1 IN- Inverting Differential Receiver Input — (TDFN only) EP Exposed Paddle. Solder to PCB ground. MAX9172 Pin Description PIN SOT23 SO/TDFN NAME FUNCTION 18 VCC Positive Power-Supply Input. Bypass with a 0.1µF and a 0.001µF capacitor to GND with the smallest capacitor closest to the pin. 2 5 GND Ground 3 7 OUT1 Receiver Output 1 4 6 OUT2 Receiver Output 2 5 4 IN2- Inverting Differential Receiver Input 2 6 3 IN2+ Noninverting Differential Receiver Input 2 7 2 IN1+ Noninverting Differential Receiver Input 1 8 1 IN1- Inverting Differential Receiver Input 1 — (TDFN only) EP Exposed Paddle. Solder to PCB ground. INPUTS OUTPUT (IN_+) - (IN_-) OUT_ ≥ 0mV High ≤ -100mV Low Open High Undriven short High Undriven parallel termination High Table 1. Input-Output Function Table |
Similar Part No. - MAX9172ESA |
|
Similar Description - MAX9172ESA |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |