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SAA7346 Datasheet(PDF) 7 Page - NXP Semiconductors |
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SAA7346 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 24 page  July 1994 7 Philips Semiconductors Preliminary specification Shock absorbing RAM addresser SAA7346 Fig.5 State machine flow diagram. handbook, full pagewidth SHOCK 7 HOLD 4 first nibble FILL 3 FILL 1 FILL 2 SSD NSF + S_NSF SSD SSD RESET 0 reset and sow flush + reset flush + reset + (empty and echo) HOLD 5 HOLD 6 first nibble full SSD PFB PFB flush + reset SSD and (NSF + S_NSF) MGB432 During normal operation the FIFO will fill up because writing is carried out twice as fast as reading; this is the fill mode. If the FIFO is full the monitor will detect and set the full flag. At the same time the fill flag will be reset thus preventing audio data from being written in to the FIFO. When the microcontroller reads the full flag from the status register, the servo control should jump back one track. The microcontroller enters a wait loop until the same absolute time subcode frame turns by again; this is the hold mode. When the spot is found again the microcontroller should set the PFB flag in the command register and the SAA7346 will resume writing to the DRAM. While in fill mode the write pointer address is saved at the end of each subcode frame. When the player exists hold mode it restores the saved address and continues writing after the last sample. When a shock is detected the SAA7346 will enter shock mode. The shock mode will last until the PFB is set by the microcontroller or the FIFO is flushed, reset or runs empty. Microcontroller interface The SAA7346 has a 3-line microcontroller interface which is compatible with TDA1301, TDA1303 and SAA7345. WRITING DATA TO THE SAA7346 The SAA7346 command register is shown in Table 1. This can be written to via the microcontroller interface as shown in Fig.6. The command register flags functions are shown in Table 2. Table 1 SAA7346 microcontroller interface registers. REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Command flush bypass echo jmp_bz otd_p e_rot_sd µCsd PFB Status Lm Lm1 FRM_ER NSF full empty SSD fill |
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