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SAA7121 Datasheet(PDF) 2 Page - NXP Semiconductors |
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SAA7121 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 32 page  1997 Jan 06 2 Philips Semiconductors Preliminary specification Digital Video Encoder (ConDENC) SAA7120; SAA7121 FEATURES • Monolithic CMOS 3.3 V (5 V) device • Digital PAL/NTSC encoder • System pixel frequency 13.5 MHz • Accepts MPEG decoded data on 8-bit wide input port; input data format Cb-Y-Cr (CCIR 656), SAV and EAV • Three DACs for Y, C and CVBS, two times oversampled with 10 bit resolution • Real time control of subcarrier • Cross colour reduction filter • Closed captioning encoding and WST- and NABTS-Teletext encoding including sequencer and filter • Line 23 wide screen signalling encoding • Fast I2C-bus control port (400 kHz) • Encoder can be master or slave • Programmable horizontal and vertical input synchronization phase • Programmable horizontal sync output phase • Internal colour bar generator (CBG) • 2 × 2 bytes in lines 20 (NTSC) for copy guard management system can be loaded via I2C-bus • Down-mode of DACs • Controlled rise/fall times of synchronization and blanking output signals • Macrovision Pay-per-View copy protection system rev.7 and rev.6.1 as option. This applies to SAA7120 only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only. Reverse engineering or disassembly is prohibited. Please contact your nearest Philips Semiconductors sales office for more information. • QFP44 package. GENERAL DESCRIPTION The SAA7120; SAA7121 encodes digital YUV video data to an NTSC or PAL CVBS or S-Video signal. The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4:2:2 multiplexed formats, for example MPEG decoded data. It includes a sync/clock generator and on-chip DACs. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VDDA analog supply voltage 3.1 3.3 3.5 V VDDD digital supply voltage 3.0 3.3 3.6 V IDDA analog supply current −− 62 mA IDDD digital supply current −− 38 mA Vi input signal voltage levels TTL compatible Vo(p-p) analog output signal voltages Y, C, and CVBS without load (peak-to-peak value) 1.2 1.35 1.45 V RL load resistance 75 − 300 Ω ILE LF integral linearity error −−±3 LSB DLE LF differential linearity error −−±1 LSB Tamb operating ambient temperature 0 − +70 °C |
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