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SAA6588T Datasheet(PDF) 9 Page - NXP Semiconductors

Part No. SAA6588T
Description  RDS/RBDS pre-processor
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com

 9 page
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1997 Sep 01
Philips Semiconductors
Product specification
RDS/RBDS pre-processor
The processed RDS/RBDS data are available for I2C-bus
request for at least 20 ms after the DAVN signal was
The DAVN signal is always automatically deactivated
(HIGH) after 10 ms or almost after the main controller has
read the RDS/RBDS data via I2C-bus (see Fig.4).
The decoder ignores new processed RDS/RBDS blocks if
the DAVN signal is active or if data overflow occurs
(see Section “Data processing control”).
Multi-path detector
The multi-path detector takes its information from the
unweighted level signal of the FM IF amplifier, input LVIN
(see Fig.1). The part of frequency components around
21 kHz is selected by a band-pass filter and rectified by a
full-wave rectifier. The capacitor at pin MRO is the charge
capacitor. In combination with internal current sources the
time constants of the rectifier are defined.
The analogous output voltage of the multi-path rectifier is
buffered and available via pin MPTH.
Signal quality detector
The signal quality detector takes its information from the
multiplex signal. Disturbances caused by
adjacent-channel reception, noise, or multi-path, generate
high frequency components (noise) on the multiplex signal
besides the audible distortion.
The signal quality measurement is provided for fast testing
alternative frequencies as well as for the tuned frequency.
It is a short start/stop procedure. The measuring time is
limited to 850
µs. To attain an average value over a longer
time, multiple measurements are possible with integration
by software processing.
The noise is detected from the frequency spectrum above
90 kHz. The noise voltage is selected by a 4th order
high-pass filter. A full-wave rectifier, controlled by this
noise voltage, charges an initially discharged capacitor (on
chip). The time is measured until the voltage across the
capacitor has reached a defined threshold value. Then
that time equivalent value is stored. The resolution of the
signal quality measurement is 4 bits (16 steps).
For operating the noise detector two modes are provided,
the triggered mode and the continuous mode. The mode is
defined by the bit SQCM (Signal Quality Continuous
Measurement) as described in Section “Programming”.
The triggered mode is provided for a fast signal quality test
of e.g. an alternative frequency. After the alternative
frequency has been tuned, the signal quality detector has
to be started (triggered) by transmitting the bits SQCM = 0
and TSQD = 1 via the I2C-bus (see Fig.5). This causes a
single shot measurement immediately after the
acknowledgement of this byte. The bit TSQD is internally
reset during the measurement (TSQD = 0). The result of
the measurement is stored and is available for reading out,
as long as no new measurement is started again e.g. after
tuning back to the previous frequency.
The continuous mode minimizes the required I2C-bus
activities for multiple measurements. After transmission of
SQCM = 1 and TSQD = 1, the signal quality detector
starts a new measurement as described above. But every
time after finishing one measuring procedure the result is
stored (overwrites the previous value within the I2C-bus
buffer SQI3 to SQI0) and a new measurement starts
automatically. If at any time the pre-processor is read out
by his master, the last measured value will be transmitted.
After transmitting the control information SQCM = 0 and
TSQD = 0, the measurement activity will be stopped.
A previously started but not yet finished measurement will
be completed and this last result will also be available.
The control bit combination SQCM = 1 and TSQD = 0
must not be used. It is reserved for later applications.
At a maximum time of 850
µs after triggering or automatic
restart of the signal quality detector, the result of the
measurement (signal quality indication) is available and
represented by the four bits SQI3 to SQI0, in a value range
of 0 to 15 and is available via the I2C-bus
(see Section “Programming”). The result 0 characterizes
no or less noise/distortion and 15 high noise/distortion.
Tolerances of the signal quality detector as well as
characteristics and tolerances of the FM IF amplifier can
be compensated by adjusting the sensitivity of the signal
quality detector with the control bits SQS0 to SQS4.
The sensitivity can be adjusted over a range of 18.6 dB
−9.0 to +9.6 dB) in steps of 0.6 dB as given in Table 10.
Pause detector
The pause detector watches the audio modulation for
pauses or very low levels. This function can be used for
performing inaudible RDS AF-tests if the radio is in FM
mode as well as for Automatic Music Search (AMS) if the
radio is in cassette mode.
The input of the pause detector (AFIN) is low-ohmic and
must be current driven (negative input of an operational
amplifier). This has the following advantages:

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