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SAA4997H Datasheet(PDF) 5 Page - NXP Semiconductors |
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SAA4997H Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 28 page 1996 Oct 24 5 Philips Semiconductors Preliminary specification VErtical Reconstruction IC (VERIC) for PALplus SAA4997H PINNING SYMBOL PIN TYPE DESCRIPTION Y_VE_1 1 output luminance output data bit 1 Y_VE_0 2 output luminance output data bit 0 U_VE_1 3 output chrominance output data bit 1 U-component U_VE_0 4 output chrominance output data bit 0 U-component V_VE_1 5 output chrominance output data bit 1 V-component V_VE_0 6 output chrominance output data bit 0 V-component VSS1 7 input ground 1 VDD1 8 input positive supply voltage 1 (+5 V) n.c. 9 − not connected n.c. 10 − not connected n.c. 11 − not connected n.c. 12 − not connected n.c. 13 − not connected n.c. 14 − not connected n.c. 15 − not connected n.c. 16 − not connected HREF_MA 17 input horizontal reference n.c. 18 − not connected VA_AI 19 input vertical reference pulse related to output data INTPOL 20 input INTPOL = 1: PALplus interpolation active INTPOL = 0: VERIC switched to bypass mode (standard signal) FILM 21 input FILM = 0: CAMERA mode FILM = 1: FILM mode EVEN_FIELD 22 input EVEN_FIELD = 0: odd field related to MACPACIC input data EVEN_FIELD = 1: even field related to MACPACIC input data CLK_16B2 23 input buffered clock input (16 MHz) VSS2 24 input ground 2 VDD2 25 input positive supply voltage 2 (+5 V) TCK 26 input boundary scan test clock input TMS 27 input boundary scan test mode select input TDI 28 input boundary scan test data input TDO_VE 29 output boundary scan test data output TRSTN 30 input boundary scan test reset input n.c. 31 − not connected n.c. 32 − not connected TEST1 33 tbf test pins TEST2 34 tbf TEST3 35 tbf CLK_32B3 36 input buffered clock input (32 MHz) VSS3 37 input ground 3 |
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