5

Timing Chart

INPUT VOLTAGE (V )

IN

DETECT RELEASE VOLTAGE (V

)

DR

DETECT VOLTAGE (V

)

DF

MIN. OPERATING VOLTAGE (V

)

MIN

GROUND VOLTAGE(V

)

DF

OUTPUT VOLTAGE (V

)

OUT

GROUND VOLTAGE(V

)

SS

Function Description (CMOS output)

When input voltage (V ) rises above detect voltage (V

), output voltage (V

) will be equal to V .

IN

DF

OUT

IN

(A condition of high impedance exists with Nch open drain output configurations.)

When input voltage (V ) falls below detect voltage (V

), output voltage (V

) will be equal to the ground voltage

IN

DF

OUT

(V

) level.

SS

When input voltage (V )falls to a level below that of the minimum operating voltage (V

), output will become unstable.

IN

MIN

In this condition, V

will equal to the pulled-up output (should output be pulled-up).

IN

When input voltage (V ) rises above the ground voltage (V

) level, output will be unstable at levels below the minimum

IN

SS

operating voltage (V

). Between the V

and detect release voltage (V

) levels, the ground voltage (V

)level will

MIN

MIN

DR

SS

be maintained.

When input voltage (V ) rises above detect release voltage (V

), output voltage (V

) will be equal to V .

IN

DR

OUT

IN

(A condition of high impedance exists with Nch open drain output configurations).

The difference between V

and V

represents the hysteresis range.

DR

DF

1

2

3

4

5

6

1

2

3

4

5

6