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XR88C681 Datasheet(PDF) 4 Page - Exar Corporation |
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XR88C681 Datasheet(HTML) 4 Page - Exar Corporation |
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4 / 101 page  XR88C681 4 Rev. 2.11 PIN DESCRIPTION 44 PLCC 40 PDIP, CDIP 28 PDIP Symbol Type Description 1 NC No Connection. 2 1 1 A0 I LSB of Address Input. This input, along with Address Inputs, A1 - A3 are used to select certain registers within the DUART device, during READ and WRITE operations with the CPU. 3 2 IP3 (TXCA - I) (RXCA - Z) I Input Port 3. General Purpose Input - When the DUART is operating in the I-mode, this input can also be used as the external clock input for the Channel A Transmitter (TXCA). When the DUART is operating in the Z-Mode, this input can be used as the external clock input for the Channel A Receiv- er (RXCA). 4 3 2 A1 I Address Input. 5 4 IP1 (-CTSB) I Input Port 1. General Purpose Input - This input can also be used as the Active Low, “Channel B Clear to Send” input. (-CTSB) 6 5 3 A2 I Address Input. 7 6 4 A3 I MSB of Address Input. This input, along with Address In- puts, A0 - A2 are used to select certain registers within the DUART device, during READ and WRITE operations with the CPU. 8 7 IP0 (-CTSA) I Input 0. General Purpose Input - This input can also be used as the active-low, “Channel A Clear-to-Send” input. (-CTSA) 9 8 5 -WR I Write Strobe (Active-Low). A “low” on this input while -CS is also “low” writes the contents of the Data Bus into the ad- dressed register, within the DUART. The transfer occurs on the rising edge of -WR. 10 9 6 -RD I Read Strobe (Active Low). A “low” on this input while -CS is also “low” places the contents of the addressed DUART regis- ter, on the data bus. 11 10 7 RXDB I Receive Serial Data Input (Channel B). The least significant bit of the character is received first. If external receiver clock, RXCB, is specified, the data is sampled on the rising edge of this clock. 12 NC No Connect. 13 11 8 TXDB O Transmitter Serial Data Output (Channel B). The least sig- nificant bit of the character is transmitted first. This output is held in the high (marking state) when the transmitter is idle, disabled, or when the channel is operating in the local LOOP- BACK mode. If an external transmitter clock is specified, TXCB, the transmitted data is shifted out of the TSR (Trans- mitter Shift Register) on the falling the edge of this clock. |
Similar Part No. - XR88C681_06 |
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Similar Description - XR88C681_06 |
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