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XR16L580 Datasheet(PDF) 7 Page - Exar Corporation |
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XR16L580 Datasheet(HTML) 7 Page - Exar Corporation |
7 / 52 page XR16L580 7 REV. 1.4.1 SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE 1.0 PRODUCT DESCRIPTION The XR16L580 (L580) is an enhanced 16C550 Universal Asynchronous Receiver and Transmitter (UART). Its features set is compatible to the ST16C580 device and additionally offers Intel or Motorola data bus interface and Power-Save to isolate the data bus interface during Sleep mode. Hence, the L580 adds 2 more inputs: 16/ 68# and PwrSave pins. The XR16L580 can operate from 2.25V to 5.5V with 5 volt tolerant inputs. The configuration registers set is 16550 UART compatible for control, status and data transfer. Also, the L580 has 16-bytes of transmit and receive FIFOs, automatic RTS/CTS hardware flow control, automatic Xon/Xoff and special character software flow control, transmit and receive FIFO trigger levels, infrared encoder and decoder (IrDA ver 1.0), programmable baud rate generator with a prescaler of divide by 1 or 4. The L580 is fabricated using an advanced CMOS process. Enhanced Features The L580 UART provides a solution that supports 16 bytes of transmit and receive FIFO memory. The L580 is designed to work with low supply voltage and high performance data communication systems, that require fast data processing time. Increased performance is realized in the L580 by the transmit and receive FIFOs, FIFO trigger level controls and automatic flow control mechanism. This allows the external processor to handle more networking tasks within a given time. This increases the service interval giving the external CPU additional time for other applications and reducing the overall UART interrupt servicing time. In addition, the L580 provides the Power-Save mode that drastically reduces the power consumption when the device is not used. The combination of the above greatly reduces the CPU’s bandwidth requirement, increases performance, and reduces power consumption. Data Bus Interface, Intel or Motorola Type The L580 provides a host interface that supports Intel or Motorola microprocessor (CPU) data bus interface. The Intel bus compatible interface allows direct interconnect to Intel compatible type of CPUs using IOR#, IOW# and CS# inputs for data bus operation. The Motorola bus compatible interface instead uses the R/W# and CS# signals for data bus transactions. See pin description section for details on all the control signals. The Intel and Motorola bus interface selection is made through the pin, 16/68#. Data Rate The L580 is capable of operation up to 3.125 Mbps at 5V, 2 Mbps at 3.3V and 1 Mbps at 2.5V supply with 16X internal sampling clock rate. The device can operate with an external 24 MHz crystal on pins XTAL1 and XTAL2, or external clock source of up to 50 MHz on XTAL1 pin. With a typical crystal of 14.7456 MHz, all standard data rates of up to 921.6 kbps can be generated. Internal Enhanced Register Sets The L580 UART has a set of enhanced registers providing control and monitoring functions. Interrupt enable/ disable and status, FIFO enable/disable, selectable TX and RX FIFO trigger levels, automatic hardware/ software flow control enable/disable, programmable baud rates, infrared encoder/decoder enable/disable, modem interface controls and status, sleep mode and Power-Save mode are all standard features. Following a power on reset or an external reset (and operating in 16 or Intel Mode), the registers defaults to the reset condition and its is compatible with previous generation of UARTs, 16C450, 16C550, 16C580, 16C650A and 16C850. |
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