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MP1522 Datasheet(PDF) 3 Page - Monolithic Power Systems |
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MP1522 Datasheet(HTML) 3 Page - Monolithic Power Systems |
3 / 6 page MP1522 – 25V STEP-UP CONVERTER IN A SOT23-5 PACKAGE MP1522 Rev. 2.0 www.MonolithicPower.com 3 9/1/2006 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2006 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 SW Power Switch Output. SW is the drain of the internal MOSFET switch. Connect the power inductor and output rectifier to SW. SW can swing between GND and 25V. 2 GND Ground. 3 FB Feedback Input. Connect a resistive voltage divider from the output voltage to FB to set the output voltage. The feedback regulation threshold is 1.23V. 4 EN Regulator On/Off Control Input. A high voltage at EN turns on the converter, and a low voltage turns it off. When not used, connect EN to the input source for automatic startup. If EN is driven over 6V, place a 100kΩ resistor in series with EN. 5 BIAS Internal Power Input. BIAS powers the internal circuitry. Connect BIAS to the output for enhancement on the internal MOSFET gate at low VIN. If the input source remains above 3.0V, BIAS can be connected to the input source to reduce power consumption. OPERATION The MP1522 is a step-up converter that operates from an input voltage as low as 2.7V and generates an output voltage up to 25V. The 0.5Ω internal N-Channel MOSFET power switch is driven with a variable frequency, constant- peak-current architecture for improved regulation and low operating current. The 550ns minimum off-time is extended to 1.6µs during start-up to yield a smooth glitch free turn-on. Start-up mode is activated at initial power-up or when exiting the 1µA shutdown state. The MP1522 features an internal regulator allowing it to be powered from the output for improved low-input voltage operation, or powered from the input source for reduced power consumption due to quiescent current. CONTROL LOGIC OFF ON REGULATOR VIN L1 D1 C1 C4 INTERNAL POWER ERROR AMP 1.23V 450mA GND EN BIAS FB SW R2 R1 C2 C3 R3 -- + CURRENT -- + VOUT GND 4 2 3 1 5 Figure 1—Functional Block Diagram |
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