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MPC8280CVRT Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MPC8280CVRT Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 80 page  MPC8280 PowerQUICC II™ Family Hardware Specifications, Rev. 1.7 6 Freescale Semiconductor Overview — Four serial communications controllers (SCCs) identical to those on the MPC860, supporting the digital portions of the following protocols: – Ethernet/IEEE 802.3 CDMA/CS – HDLC/SDLC and HDLC bus – Universal asynchronous receiver transmitter (UART) – Synchronous UART – Binary synchronous (BISYNC) communications – Transparent — Universal serial bus (USB) controller – Supports USB 2.0 full/low rate compatible – USB host mode – Supports control, bulk, interrupt, and isochronous data transfers – CRC16 generation and checking – NRZI encoding/decoding with bit stuffing – Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and data rate configuration). Note that low-speed operation requires an external hub. – Flexible data buffers with multiple buffers per frame – Supports local loopback mode for diagnostics (12 Mbps only) – Supports USB slave mode – Four independent endpoints support control, bulk, interrupt, and isochronous data transfers – CRC16 generation and checking – CRC5 checking – NRZI encoding/decoding with bit stuffing – 12- or 1.5-Mbps data rate – Flexible data buffers with multiple buffers per frame – Automatic retransmission upon transmit error — Two serial management controllers (SMCs), identical to those of the MPC860 – Provide management for BRI devices as general circuit interface (GCI) controllers in time- division-multiplexed (TDM) channels – Transparent – UART (low-speed operation) — One serial peripheral interface identical to the MPC860 SPI — One inter-integrated circuit (I2C) controller (identical to the MPC860 I2C controller) – Microwire compatible – Multiple-master, single-master, and slave modes — Up to eight TDM interfaces (four on the MPC8270) – Supports two groups of four TDM channels for a total of eight TDMs (one group of four on the MPC8270 and the MPC8275) – 2,048 bytes of SI RAM – Bit or byte resolution – Independent transmit and receive routing, frame synchronization |
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