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MPC859DSLVR50A Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MPC859DSLVR50A Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 96 page MPC866/MPC859 Hardware Specifications, Rev. 2 10 Freescale Semiconductor Power Dissipation 5 Power Dissipation Table 5 shows power dissipation information. The modes are 1:1, where CPU and bus speeds are equal, and 2:1 mode, where CPU frequency is twice the bus speed. 6 DC Characteristics Table 6 shows the DC electrical characteristics for the MPC866/859. Table 5. Power Dissipation (PD) Die Revision Bus Mode CPU Frequency Typical 1 1 Typical power dissipation at VDDL and VDDSYN is at 1.8 V. and VDDH is at 3.3 V. Maximum 2 2 Maximum power dissipation at VDDL and VDDSYN is at 1.9 V, and VDDH is at 3.465 V. NOTE Values in Table 5 represent VDDL based power dissipation and do not include I/O power dissipation over VDDH. I/O power dissipation varies widely by application due to buffer current, depending on external circuitry. The VDDSYN power dissipation is negligible. Unit 0 1:1 50 MHz 110 140 mW 66 MHz 150 180 mW 2:1 66 MHz 140 160 mW 80 MHz 170 200 mW 100 MHz 210 250 mW 133 MHz 260 320 mW Table 6. DC Electrical Specifications Characteristic Symbol Min Max Unit Operating voltage VDDL (core) 1.7 1.9 V VDDH (I/O) 3.135 3.465 V VDDSYN 1 1.7 1.9 V Difference between VDDL to VDDSYN — 100 mV Input high voltage (all inputs except EXTAL and EXTCLK) 2 VIH 2.0 3.465 V |
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