33887 datasheet(4/37 Pages) FREESCALE

Part #	33887

Description	5.0 A H-Bridge with Load Current Feedback

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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Analog Integrated Circuit Device Data

4

Freescale Semiconductor

33887

PIN CONNECTIONS

Figure 4. 33887 Pin Connections

Table 2. PQFN PIN DEFINITIONS

A functional description of each pin can be found in the Functional Pin DescriptionS section, page 21.

Pin Name

Formal Name

Definition

1, 7, 10, 16,

19, 28, 31

NC

No Connect

No internal connection to this pin.

2

D1

Disable 1

Active HIGH input used to simultaneously tri-state disable both H-Bridge

outputs. When D1 is Logic HIGH, both outputs are tri-stated.

3

IN2

Logic Input Control 2

Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).

4

EN

Enable

Logic input Enable control of device (i.e., EN logic HIGH = full operation,

EN logic LOW = Sleep Mode).

5, 6, 12, 13, 34, 35

V+

Positive Power Supply

Positive supply connections.

8

AGND

Analog Ground

Low-current analog signal ground.

9

FS

Fault Status for H-Bridge

Open drain active LOW Fault Status output requiring a pull-up resistor to

5.0 V.

11

IN1

Logic Input Control 1

Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).

14, 15, 17, 18

OUT1

H-Bridge Output 1

Output 1 of H-Bridge.

20

FB

Feedback for H-Bridge

Current feedback output providing ground referenced 1/375th ratio of

H-Bridge high-side current.

21–26

PGND

Power Ground

High-current power ground.

27

D2

Disable 2

Active LOW input used to simultaneously tri-state disable both H-Bridge

outputs. When D2 is Logic LOW, both outputs are tri-stated.

29, 30, 32, 33

OUT2

H-Bridge Output 2

Output 2 of H-Bridge.

36

CCP

Charge Pump Capacitor

External reservoir capacitor connection for internal charge pump

capacitor.

Pad

Thermal

Interface

Exposed Pad Thermal

Interface

Exposed pad thermal interface for sinking heat from the device.

Note: Must be DC-coupled to analog ground and power ground via very

low impedance path to prevent injection of spurious signals into IC

substrate.

D2

NC

28

27

26

25

24

23

22

21

2

3

4

5

6

7

8

9

PGND

IN2

D1

EN

V+

NC

AGND

FS

20

FB

19

NC

10

NC

1

NC

Transparent Top View of Package

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