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MC68HC908JK3CDW Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MC68HC908JK3CDW Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 212 page  Table of Contents MC68H(R)C908JL3 — Rev. 1.1 Technical Data Freescale Semiconductor Table of Contents 9 9.4.6 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 9.5 Security. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Section 10. Timer Interface Module (TIM) 10.1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 10.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 10.3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 10.4 Pin Name Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 10.5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 10.5.1 TIM Counter Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 10.5.2 Input Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 10.5.3 Output Compare. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 10.5.3.1 Unbuffered Output Compare . . . . . . . . . . . . . . . . . . . . . 120 10.5.3.2 Buffered Output Compare . . . . . . . . . . . . . . . . . . . . . . . 120 10.5.4 Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . . 121 10.5.4.1 Unbuffered PWM Signal Generation . . . . . . . . . . . . . . . 122 10.5.4.2 Buffered PWM Signal Generation . . . . . . . . . . . . . . . . . 123 10.5.4.3 PWM Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 10.6 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 10.7 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 10.8 TIM During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 126 10.9 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 10.10 I/O Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 10.10.1 TIM Status and Control Register (TSC) . . . . . . . . . . . . . . . 127 10.10.2 TIM Counter Registers (TCNTH:TCNTL) . . . . . . . . . . . . . . 129 10.10.3 TIM Counter Modulo Registers (TMODH:TMODL) . . . . . . 130 10.10.4 TIM Channel Status and Control Registers (TSC0:TSC1) . 131 10.10.5 TIM Channel Registers (TCH0H/L:TCH1H/L) . . . . . . . . . . 135 |
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