Philips Semiconductors

Product specification

N-channel logic level TrenchMOS

™ transistor

PSMN005-25D

FEATURES

SYMBOL

QUICK REFERENCE DATA

• ’Trench’ technology

V

• Very low on-state resistance

• Fast switching

I

• Logic level compatible

R

R

GENERAL DESCRIPTION

PINNING

SOT428 (DPAK)

SiliconMAX products use the latest

PIN

DESCRIPTION

Philips

Trench

technology

to

achieve

the

lowest

possible

1

gate

on-state

resistance

in

each

package at each voltage rating.

2

drain

1

Applications:-

3

source

• d.c. to d.c. converters

• switched mode power supplies

tab

drain

The PSMN005-25D is supplied in

the

SOT428

(Dpak)

surface

mounting package.

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V

DSS

Drain-source voltage

T

-

25

V

V

DGR

Drain-gate voltage

T

-25

V

V

GS

Continuous gate-source

-

± 15

V

voltage

V

GSM

Peak pulsed gate-source

T

-

± 20

V

voltage

I

D

Continuous drain current

T

25 ˚C; V

-

75

2

A

T

-

70

A

I

DM

Pulsed drain current

T

-

240

A

P

D

Total power dissipation

T

-

125

W

T

Operating junction and

- 55

175

˚C

storage temperature

d

g

s

1

2

3

tab

1 It is not possible to make connection to pin 2 of the SOT428 package.

2 Continuous current rating limited by package.

October 1999

1

Rev 1.100