PSMN005-55B datasheet(4/9 Pages) PHILIPS

Part #	PSMN005-55B

Description	N-channel logic level TrenchMOS transistor

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Manufacturer	PHILIPS [NXP Semiconductors]

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Philips Semiconductors

Product specification

N-channel logic level TrenchMOS

™ transistor

PSMN005-55B, PSMN005-55P

Fig.1. Normalised power dissipation.

PD% = 100

⋅P

D/PD 25 ˚C = f(Tmb)

Fig.2. Normalised continuous drain current.

ID% = 100

⋅I

D/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V

Fig.3. Safe operating area. T

mb = 25 ˚C

I

D & IDM = f(VDS); IDM single pulse; parameter tp

Fig.4. Transient thermal impedance.

Z

th j-mb = f(t); parameter D = tp/T

Fig.5. Typical output characteristics, T

j = 25 ˚C.

I

D = f(VDS)

Fig.6. Typical on-state resistance, T

j = 25 ˚C.

R

DS(ON) = f(ID)

Normalised Power Derating, PD (%)

0

10

20

30

40

50

60

70

80

90

100

0

25

50

75

100

125

150

175

Mounting Base temperature, Tmb (C)

0.001

0.01

0.1

1

1E-06

1E-05

1E-04

1E-03

1E-02

1E-01

1E+00

Pulse width, tp (s)

Transient thermal impedance, Zth j-mb (K/W)

single pulse

D = 0.5

0.2

0.1

0.05

0.02

tp

D = tp/T

D

P

T

Normalised Current Derating, ID (%)

0

10

20

30

40

50

60

70

80

90

100

0

25

50

75

100

125

150

175

Mounting Base temperature, Tmb (C)

02468

10

0

100

200

300

400

ID/A

VDS/D

VGS\V =

2.4

2.6

2.8

3.0

3.2

3.4

3.6

3.8

4.0

4.2

4.4

4.6

4.8

5.0

6.0

7.0

10.0

1

10

100

1000

1

10

100

Drain-Source Voltage, VDS (V)

Peak Pulsed Drain Current, IDM (A)

D.C.

100 ms

10 ms

RDS(on) = VDS/ ID

1 ms

tp = 10 us

100 us

0

20406080

100

5

5.5

6

6.5

7

7.5

8

8.5

RDS(ON)/mOhm

VGS/V =

ID/A

3.0

3.2

3.4

3.6

4.0

5.0

October 1999

4

Rev 1.200

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PSMN005-55B Datasheet(PDF) 4 Page - NXP Semiconductors

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