Philips Semiconductors

Product specification

N-channel logic level TrenchMOS

™ transistor

PSMN004-25B, PSMN004-25P

MECHANICAL DATA

Fig.17. SOT404 surface mounting package. Centre pin connected to mounting base.

Notes

1. This product is supplied in anti-static packaging. The gate-source input must be protected against static

discharge during transport or handling.

2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.

3. Epoxy meets UL94 V0 at 1/8".

UNIT

A

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

mm

A1

D1

D

max.

E

eLp

HD

Q

c

2.54

2.60

2.20

15.40

14.80

2.90

2.10

11

1.60

1.20

10.30

9.70

4.50

4.10

1.40

1.27

0.85

0.60

0.64

0.46

b

DIMENSIONS (mm are the original dimensions)

SOT404

0

2.5

5 mm

scale

(one lead cropped)

SOT404

e

e

E

b

D1

HD

D

Q

Lp

c

A1

A

13

2

mounting

base

98-12-14

99-06-25

October 1999

8

Rev 1.100