MC68HC705F32CFU datasheet(10/198 Pages) FREESCALE

Part #	MC68HC705F32CFU

Description	a member of the M68HC05 family of HCMOS

Download	198 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

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10 / 198 page

MOTOROLA

ii

MC68HC05F32

TABLE OF CONTENTS

Paragraph

Number

Page

Number

TITLE

2.4.16.2

External clock................................................................................................2–8

2.5

Alternative pin descriptions for the 80-pin QFP package .......................................2–10

2.5.1

PC5, PC4, PC0/TACP3.....................................................................................2–10

2.5.2

PD7–PD0..........................................................................................................2–10

3

MEMORY AND REGISTERS

3.1

Registers ..................................................................................................................3–1

3.2

RAM .........................................................................................................................3–5

3.3

ROM .........................................................................................................................3–5

3.4

Bootloader ROM.......................................................................................................3–6

3.5

EEPROM ..................................................................................................................3–6

3.5.1

EEPROM programming register .........................................................................3–6

3.5.2

Programming and erasing procedures................................................................3–8

3.5.3

Sample EEPROM programming sequence ........................................................3–8

4

PARALLEL INPUT/OUTPUT PORTS

4.1

Input/output programming ........................................................................................4–1

4.2

Port A........................................................................................................................4–2

4.2.1

Keyboard interrupt ..............................................................................................4–2

4.2.1.1

Key control register (KCR) ............................................................................4–3

4.3

Port B........................................................................................................................4–4

4.4

Port C .......................................................................................................................4–5

4.5

Port D .......................................................................................................................4–5

4.6

Port E........................................................................................................................4–6

4.7

Ports F, G, H, I and J ................................................................................................4–6

4.8

Port registers ............................................................................................................4–7

4.8.1

Port data registers (Ports A, B, C, D, E, F, G, H, I and J) ....................................4–7

4.8.2

Data direction registers (DDRA, DDRB, DDRC, DDRD and DDRE) ..................4–7

4.8.3

Port control registers...........................................................................................4–8

5

CORE TIMER

5.1

Real time interrupts (RTI) .........................................................................................5–2

5.2

Core timer registers ..................................................................................................5–3

5.2.1

Core timer control and status register (CTCSR) .................................................5–3

5.2.2

Core timer counter register (CTCR)....................................................................5–4

5.3

Computer operating properly (COP) watchdog timer ...............................................5–5

5.4

Core timer during WAIT ............................................................................................5–5

5.5

Core timer during STOP ...........................................................................................5–5

TPG

11

05F32Book Page ii Tuesday, June 8, 1999 7:55 am

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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