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PHX4N60E Datasheet(PDF) 6 Page - NXP Semiconductors |
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PHX4N60E Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 8 page Philips Semiconductors Product specification PowerMOS transistors PHX4N60E Avalanche energy rated Fig.13. Typical turn-on gate-charge characteristics. V GS = f(QG); parameter VDS Fig.14. Typical switching times; t d(on), tr, td(off), tf = f(RG) Fig.15. Normalised drain-source breakdown voltage; V (BR)DSS/V(BR)DSS 25 ˚C = f(Tj) Fig.16. Source-Drain diode characteristic. I F = f(VSDS); parameter Tj Fig.17. Maximum permissible non-repetitive avalanche current (I AS) versus avalanche time (tp); unclamped inductive load Fig.18. Maximum permissible repetitive avalanche current (I AR) versus avalanche time (tp) 0 1020 30 40 506070 0 5 10 15 PHP3N60 Qg, Gate charge (nC) VGS, Gate-Source voltage (Volts) VDD = 480 V 240 V 120 V ID = 4.5 A Tj = 25 C 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 5 10 15 20 PHP3N60 VSDS, Source-Drain voltage (Volts) IF, Source-Drain diode current (Amps) VGS = 0 V 150 C Tj = 25 C 0 1020 3040 5060 10 100 1000 td(on) tr tf PHP3N60 RG, Gate resistance (Ohms) Switching times (ns) Tj = 25 C VDD = 300 V RD = 68 Ohms td(off) VGS = 10 V PHP4N60E 0.1 1 10 1E-06 1E-05 1E-04 1E-03 1E-02 Avalanche time, tp (s) Non-repetitive Avalanche current, IAS (A) 25 C VDS ID tp Tj prior to avalanche = 125 C -100 -50 0 50 100 150 0.85 0.9 0.95 1 1.05 1.1 1.15 Tj, Junction temperature (C) Normalised Drain-source breakdown voltage V(BR)DSS @ Tj V(BR)DSS @ 25 C PHP4N60E 0.01 0.1 1 10 1E-06 1E-05 1E-04 1E-03 1E-02 Avalanche time, tp (s) Maximum Repetitive Avalanche Current, IAR (A) 125 C Tj prior to avalanche = 25 C December 1998 6 Rev 1.200 |
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