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PHT6N06 Datasheet(PDF) 1 Page - NXP Semiconductors |
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PHT6N06 Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 10 page Philips Semiconductors Product specification TrenchMOS ™ transistor PHT6N06T Standard level FET GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT logic level field-effect power transistor in a plastic envelope V DS Drain-source voltage 55 V suitable for surface mounting. I D Drain current (DC) T sp = 25 ˚C 5.5 A Using ’trench’ technology the Drain current (DC) T amb = 25 ˚C 2.5 A device features very low P tot Total power dissipation 8.3 W on-state resistance and has T j Junction temperature 150 ˚C integral zener diodes giving R DS(ON) Drain-source on-state 150 m Ω ESD protection. It is intended for resistance V GS = 10 V use in DC-DC converters and general purpose switching applications. PINNING - SOT223 PIN CONFIGURATION SYMBOL PIN DESCRIPTION 1 gate 2 drain 3 source 4 drain (tab) LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS Drain-source voltage - - 55 V V DGR Drain-gate voltage R GS = 20 kΩ -55 V ±V GS Gate-source voltage - - 20 V I D Drain current (DC) T sp = 25 ˚C - 5.5 A T amb = 25 ˚C - 2.5 A I D Drain current (DC) T sp = 100 ˚C - 3.8 A T amb = 100 ˚C - 1.75 A I DM Drain current (pulse peak value) T sp = 25 ˚C - 22 A T amb = 25 ˚C - 10 A P tot Total power dissipation T sp = 25 ˚C - 8.3 W T amb = 25 ˚C - 1.8 W T stg, Tj Storage & operating temperature - - 55 150 ˚C ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V C Electrostatic discharge capacitor Human body model - 2 kV voltage (100 pF, 1.5 k Ω) d g s 4 1 23 September 1997 1 Rev 1.000 |
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