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IA88C00-PDW48I Datasheet(PDF) 2 Page - InnovASIC, Inc |
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IA88C00-PDW48I Datasheet(HTML) 2 Page - InnovASIC, Inc |
2 / 80 page IA88C00 Data Sheet Microcontroller As of Production Version -01 Copyright © 2005 ENG 21 0 050519-00 www.Innovasic Innovasic.com Innovasic Semiconductor Page 2 of 80 1.888.824.4184 Data Sheet Contents Please Note.....................................................................................................................................................4 Features ..........................................................................................................................................................4 General Description .......................................................................................................................................4 Architecture..................................................................................................................................................13 Pin Descriptions ...........................................................................................................................................13 Registers .......................................................................................................................................................14 Working Register Window ......................................................................................................................15 Register List .............................................................................................................................................17 Mode and Control Registers ........................................................................................................................20 Instruction Summary....................................................................................................................................45 Opcode Map .................................................................................................................................................52 Instructions...................................................................................................................................................53 Interrupts ......................................................................................................................................................56 Interrupt Programming Model .................................................................................................................58 Functional Overview................................................................................................................................58 Stack Operation ............................................................................................................................................58 Counter/Timers ............................................................................................................................................59 WDT.............................................................................................................................................................59 Stop Mode ....................................................................................................................................................59 Halt Mode ....................................................................................................................................................60 I/O Ports .......................................................................................................................................................61 Port 0 ........................................................................................................................................................61 Port 1 ........................................................................................................................................................61 Port 2 and 3 ..............................................................................................................................................62 Port 4 ........................................................................................................................................................62 UART...........................................................................................................................................................62 Pins...........................................................................................................................................................63 Transmitter ...............................................................................................................................................63 Receiver....................................................................................................................................................63 Address Space ..........................................................................................................................................64 CPU Program Memory ............................................................................................................................64 CPU Data Memory...................................................................................................................................64 Absolute Maximum Ratings ........................................................................................................................66 Standard Test Conditions .............................................................................................................................66 Figure 63. Standard Test Load .............................................................................................................................66 DC Characteristics .......................................................................................................................................67 Input Handshake.......................................................................................................................................73 Output Handshake....................................................................................................................................74 EPROM Read Cycle ................................................................................................................................75 |
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