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| STG3690_05 |
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STMICROELECTRONICS |
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6 page
STG3690 6/12 Figure 9: Test Circuit CL = 5/35pF or equivalent (includes jig and probe capacitance) RL = 50Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 10: Break Before Make Time Delay Figure 11: Switching Time And Charge Injection (VGEN=0V, RGEN=0Ω, RL=1MΩ, CL=100pF) |