4

Data Sheet

1 Mbit Serial Flash

SST45LF010

©2003 Silicon Storage Technology, Inc.

S71128-04-000

3/03

372

TABLE

Symbol

Pin Name

Functions

SCK

Serial Clock

To provide the timing of the serial interface. Commands, addresses, or input data are latched

on the rising edge of the clock input, while output data is shifted out on the falling edge of the

clock input.

SI

Serial Data Input

To transfer commands, addresses, or data serially into the device. Inputs are latched on the

rising edge of the serial clock.

SO

Serial Data Output

To transfer data serially out of the device.

Data is shifted out on the falling edge of the serial clock.

CE#

Chip Enable

The device is enabled by a high to low transition on CE#.

WP#

Write Protect

To protect the device from unintentional Write (Erase or Program) operations. When WP# is

low, all Erase and Program commands are ignored. When WP# is high, the device may be

erased or programmed. This pin has an internal pull-up and could remain unconnected when

not used.

RST#

Reset

A high to low transition on RST# will terminate any operation in progress and reset the internal

logic to the standby mode. The device will remain in the reset condition as long as the RST# is

low. Operations may only occur when RST# is high. This pin has an internal pull-up and could

remain unconnected when not used.

Power Supply

To provide power supply (3.0-3.6V).

Ground

T2.5 372

1

2

3

4

8

7

6

5

WP#

VDD

CE#

SCK

RST#

VSS

SO

SI

Top View

372 ILL F01.6

1

2

3

4

8

7

6

5

WP#

VDD

CE#

SCK

Top View

RST#

VSS

SO

SI

372 ILL F01a.2