VMIVME-5565 Ultrahigh Speed Fiber-Optic Reflective Memory with Interrupts

Fiber-Optic Cable Assemblies

A B C D E F

VMICBL-000-F5

–

0

0 0 0

ABC = Cable Lengths

000 = .5 ft (0.15m)

011 = 350 ft (106.68m)

001 = 1 ft (.31m)

012 = 500 ft (152.15m)

002 = 5 ft (1.52m)

013 = 574 ft (175m)

003 = 10 ft (3.04m)

014 = 656 ft (200m)

004 = 25 ft (7.62m)

015 = 820 ft (250m)

005 = 50 ft (15.24m)

016 = 1,000 ft (304.30m)

006 = 80 ft (24.40m)

017 = 1,148 ft (350m)

007 = 100 ft (30.49m)

018 = 1,312 ft (400m)

008 = 150 ft (45.72m)

019 = 1,500 ft (456.45m)

009 = 200 ft (60.98m)

020 = 1,640 ft (500m)

010 = 250 ft (76.20m)

DEF = 0 (Options reserved for future use)

For Ordering Information, Call:

1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859

Email: info.embeddedsystems@gefanuc.com

Copyright © 2005 by GE Fanuc Embedded Systems

Specifications subject to change without notice.

Functional Characteristics

GE Fanuc Embedded Systems VMIxxx-5565 family of Reflective

Memory real-time network products. The other members of the

family are VMIVME-5565, PCI mezzanine card (PMC), and

VMIPCI-5565, the PCI-compatible board. All three of these

products are network compatible, and may be integrated into a

network in any combination. This family of products allows

computers, workstations, PLCs, and other embedded controllers

with dissimilar operating systems, or no operating system at all,

to share data in real time.

To the local node, the Reflective Memory board appears as

shared memory. Data can be written to or read from the

memory by any level of software, including the application

itself. Data written to the Reflective Memory in one node is

transported by the network hardware to all other nodes, and

placed in the same address on those node’s Reflective Memory

boards. This transport of data is accomplished without the

involvement of the processors on any node. Using this system,

all nodes on the network have a local copy of shared data

available for immediate access.

very fast and efficient way of sharing data across distributed

computer systems.

GE Fanuc Embedded Systems’ VMIVME-5565 Reflective Memory

interface allows data to be shared between up to 256

independent systems (nodes) at rates up to 174 Mbyte/s. Each

Reflective Memory board can be configured with either

64 Mbyte or 128 Mbyte of onboard SDRAM. The local SDRAM

provides fast Read access times to stored data. Writes are

stored in local SDRAM and broadcast over a high speed fiber-

optic data path to other Reflective Memory nodes. The transfer

of data between nodes is software transparent, so no I/O

overhead is required. Transmit and Receive FIFOs buffer data

during peak data rates to optimize processor and bus

performance to maintain high data throughput.

The Reflective Memory also allows interrupts to one or more

nodes by writing to a byte register. These interrupt (four levels,

each user definable) signals may be used to synchronize a

system process, or used to follow any data. The interrupt

always follows the data to ensure the reception of the data

before the interrupt is acknowledged.

Each node on the system has a unique identification number

between 0 and 255. The node number is established during

hardware system integration by a series of onboard switches.

This node number can be read by software by accessing an

onboard register. In some applications, this node number would

be useful in establishing the function of the node.

chain ring as shown in Figure 1. Each transfer is passed from

node-to-node until it has gone all the way around the ring and

reaches the originating node. Each node retransmits all

transfers that it receives except those that it originated. Nodes

are allowed to insert transfers between transfers passing

through.

interrupts. Any processor can generate an interrupt on any

other node on the network. In addition, any processor can

generate an interrupt on all nodes on the network with a single

register write.

In response to this interrupt register write, the sending

VMIVME-5565 issues a special packet over the network, which

contains the command strobe, the sender node ID, the

destination node ID, and 32 bits of data. When a receiving node

detects the proper combination of destination node ID and

command strobe, it stores the sender note ID and the data in

one of four 127 location-deep FIFOs. The four FIFOs correspond

to the four interrupts. Upon storing this information in a FIFO,

the receiving node issues an interrupt to the local processor if it

has been software-enabled. The 32 bits of data stored in the

FIFO is user-definable and typically is treated as an interrupt

vector. As part of an interrupt service routine, the local

processor reads this information out of the FIFO and acts

accordingly.

Ordering Options

May 13, 2005 800-005565-000 E

A B C D E F

VMIVME-5565

–

1

0 0 0

A = Memory Options

0 = 64 Mbyte

1 = 128 Mbyte

B = FIFOs

0 = Reserved

1 = 4 K FIFOs

C = Transmission Mode

0 = Multimode

1 = Single Mode

DEF = 0 (Options reserved for future use)

Simplex Cable Specifications

Fiber-Optic Cable – Multimode; (62.5 Micron core)

2