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SN65MLVD205ADG4 Datasheet(PDF) 1 Page - Texas Instruments

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Part # SN65MLVD205ADG4
Description  MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
Download  26 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65MLVD205ADG4 Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION
APPLICATIONS
SN65MLVD200A, SN65MLVD202A
SN65MLVD204A, SN65MLVD205A
SLLS573 – DECEMBER 2003
MULTIPOINT-LVDS LINE DRIVER AND RECEIVER
Low-Voltage Differential 30-
Ω to 55-Ω Line
The SN65MLVD200A, 202A, 204A, and 205A are
Drivers and Receivers for Signaling Rates (1)
multipoint-low-voltage
differential
(M-LVDS)
line
Up to 100 Mbps, Clock Frequencies up to
drivers and receivers, which are optimized to operate
at signaling rates up to 100 Mbps. All parts comply
50 MHz
with the multipoint low-voltage differential signaling
Type-1 Receivers Incorporate 25 mV of
(M-LVDS) standard TIA/EIA-899. These circuits are
Hysteresis (200A, 202A)
similar to their TIA/EIA-644 standard compliant LVDS
Type-2 Receivers Provide an Offset(100 mV)
counterparts,
with
added
features
to
address
Threshold to Detect Open-Circuit and Idle-Bus
multipoint applications. The driver output has been
Conditions (204A, 205A)
designed to support multipoint buses presenting
loads as low as 30
Ω, and incorporates controlled
Meets or Exceeds the M-LVDS Standard
transition times to allow for stubs off of the backbone
TIA/EIA-899 for Multipoint Data Interchange
transmission line.
Power Up/Down Glitch Free
These devices have Type-1 and Type-2 receivers
Controlled Driver Output Voltage Transition
that detect the bus state with as little as 50 mV of
Times for Improved Signal Quality
differential
input
voltage
over
a
common-mode
–1 V to 3.4 V Common-Mode Voltage Range
voltage range of –1 V to 3.4 V. The Type-1 receivers
Allows Data Transfer With 2 V of Ground
exhibit 25 mV of differential input voltage hysteresis
Noise
to prevent output oscillations with slowly changing
signals or loss of input. Type-2 receivers include an
Bus Pins High Impedance When Disabled or
offset threshold to provide a known output state
V
CC ≤ 1.5 V
under
open-circuit,
idle-bus,
and
other
fault
200-Mbps Devices Available (SN65MLVD201,
conditions.
203, 206, 207)
The SN65MLVD200A, 202A, 204A, and 205A have
Bus Pin ESD Protection Exceeds 8 kV
enhancements over their predecessors. Improved
Package in 8-Pin SOIC (200A, 204A) and
features include better controlled slew rate on the
14-Pin SOIC (202A, 205A)
driver output to help minimize reflections while
improving overall signal integrity (SI) resulting in
Improved Alternatives to the SN65MLVD200,
better jitter performance. Additionally, 8-kV ESD
202, 204, and 205
protection on the bus pins for more robustness. The
same footprint definition was maintained making for
an
easy
drop-in
replacement
for
a
system
Low-Power High-Speed Short-Reach
performance upgrade.
Alternative to TIA/EIA-485
The devices are characterized for operation from
Backplane or Cabled Multipoint Data and
–40
°C to 85°C.
Clock Transmission
Cellular Base Stations
Central-Office Switches
Network Switches and Routers
(1)
The signaling rate of a line, is the number of voltage
transitions that are made per second expressed in the nits
bps (bits per second).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–TBD, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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