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3D7612W-10 Datasheet(PDF) 1 Page - Data Delay Devices, Inc. |
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3D7612W-10 Datasheet(HTML) 1 Page - Data Delay Devices, Inc. |
1 / 7 page 3D7608 & 3D7612 8-BIT & 12-BIT PROGRAMMABLE PULSE GENERATORS (SERIES 3D7608 & 3D7612: PARALLEL INTERFACE) FEATURES PACKAGES / PINOUTS • All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs • Vapor phase, IR and wave solderable • Programmable via latched parallel interface • Increment range: 0.25ns through 800us • Pulse width tolerance: 1% (See Table 1) • Supply current: 8mA typical • Temperature stability: ±1.5% max (-40C to 85C) • Vdd stability: ±0.5% max (4.75V to 5.25V) FUNCTIONAL DESCRIPTION The 3D7608 & 3D7612 devices are versatile 8- & 12-bit programmable monolithic pulse generators. A rising-edge on the trigger input (TRIG) initiates the pulse, which is presented on the output pins (OUT,OUTB). The pulse width, programmed via the parallel interface, can be varied over 255 (3D7608) or 4095 (3D7612) equal steps according to the formula: tPW = tinh + addr * tinc where addr is the programmed address, tinc is the pulse width increment (equal to the device dash number), and tinh is the inherent (address zero) pulse width. The device also offers a reset input (RES), which can be used to terminate the pulse before the programmed time has expired. The all-CMOS 3D7608 & 3D7612 integrated circuits have been designed as reliable, economic alternatives to hybrid TTL pulse generators. The 3D7608 is offered in a standard 16-pin SOIC, and the 3D7612 is offered in a standard 20-pin SOL. TABLE 1: PART NUMBER SPECIFICATIONS data delay devices, inc. 3 PIN DESCRIPTIONS TRIG Trigger Input RES Reset Input OUT Pulse Output OUTB Complementary Pulse Output AE Address Enable Input P0-P11 Address Inputs VDD +5 Volts GND Ground NC Do not connect externally For mechanical dimensions, click here. For package marking details, click here. 1 2 3 4 5 7 8 16 15 14 13 12 10 9 TRIG RES P0 P2 P4 NC GND VDD OUT OUTB P1 P3 P7 AE 3D7608R-xx SOIC 6 11 P6 P5 7 14 P8 P7 1 2 3 4 5 6 8 9 10 20 19 18 17 16 15 13 12 11 TRIG RES P0 P2 P4 P6 NC P10 GND VDD OUT OUTB P1 P3 P5 P9 AE P11 3D7612W-xx SOL NOTE: Any increment between 0.25ns and 800us (50us for the 12-bit generator) not shown is also available as a standard device. PART # (8-BIT) PART # (12-BIT) Pulse Width Increment Maximum P.W. (8-Bit) Maximum P.W. (12-Bit) PART # (8-BIT) Pulse Width Increment Maximum P.W. (8-Bit) 3D7608R-0.25 3D7612W-0.25 0.25ns ± 0.12ns 73.25ns ± 3ns 1.03us ± 10ns 3D7608R-100K 100us ± 50us 25.5ms ± 260us 3D7608R-0.5 3D7612W-0.5 0.50ns ± 0.25ns 137.5ns ± 3ns 2.05us ± 21ns 3D7608R-200K 200us ± 100us 51.0ms ± 510us 3D7608R-1 3D7612W-1 1.0ns ± 0.5ns 265ns ± 3ns 4.10us ± 41ns 3D7608R-500K 500us ± 250us 128ms ± 1.3ms 3D7608R-2 3D7612W-2 2.0ns ± 1.0ns 520ns ± 6ns 8.19us ± 82ns 3D7608R-800K 800us ± 400us 204ms ± 2.1ms 3D7608R-5 3D7612W-5 5.0ns ± 2.5ns 1.28us ± 13ns 20.5us ± 205ns 3D7608R-10 3D7612W-10 10ns ± 5.0ns 2.56us ± 26ns 41.0us ± 410ns 3D7608R-20 3D7612W-20 20ns ± 10ns 5.11us ± 52ns 81.9us ± 819ns 3D7608R-50 3D7612W-50 50ns ± 25ns 12.8us ± 128ns 205us ± 2.1us 3D7608R-100 3D7612W-100 100ns ± 50ns 25.5us ± 255ns 410us ± 4.1us 3D7608R-200 3D7612W-200 200ns ± 100ns 51.0us ± 510ns 819us ± 8.2us 3D7608R-500 3D7612W-500 500ns ± 250ns 128us ± 1.3us 2.05ms ± 21us 3D7608R-1K 3D7612W-1K 1.0us ± 0.5us 255us ± 2.6us 4.10ms ± 41us 3D7608R-2K 3D7612W-2K 2.0us ± 1.0us 510us ± 5.2us 8.19ms ± 82us 3D7608R-5K 3D7612W-5K 5.0us ± 2.5us 1.28ms ± 13us 20.5ms ± 205us 3D7608R-10K 3D7612W-10K 10us ± 5.0us 2.55ms ± 26us 41.0ms ± 410us 3D7608R-20K 3D7612W-20K 20us ± 10us 5.10ms ± 52us 81.9ms ± 819us 3D7608R-50K 3D7612W-50K 50us ± 25us 12.8ms ± 128us 205ms ± 2.1 ms 2006 Data Delay Devices Doc #06009 DATA DELAY DEVICES, INC. 1 5/8/2006 3 Mt. Prospect Ave. Clifton, NJ 07013 |
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